Add the files.

[u-boot] / lib_m68k / time.c

diff --git a/lib_m68k/time.c b/lib_m68k/time.c
index 0b85411dd87b4edf9af0a219af3c6d5327387bed..12e38f0577f8e85bd2f2c4581128aa82340bf8e9 100644 (file)
--- a/lib_m68k/time.c
+++ b/lib_m68k/time.c
@@ -27,6 +27,11 @@
 
 #include <asm/mcftimer.h>
 
+#ifdef CONFIG_M5271
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+#endif
+
 #ifdef CONFIG_M5272
 #include <asm/m5272.h>
 #include <asm/immap_5272.h>
@@ -36,9 +41,14 @@
 #include <asm/m5282.h>
 #endif
 
+#ifdef CONFIG_M5249
+#include <asm/m5249.h>
+#include <asm/immap_5249.h>
+#endif
+
 
 static ulong timestamp;
-#ifdef CONFIG_M5282
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
 static unsigned short lastinc;
 #endif
 
@@ -122,10 +132,36 @@ void set_timer (ulong t)
 }
 #endif
 
-#if defined(CONFIG_M5282)
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
 
 void udelay(unsigned long usec)
 {
+       volatile unsigned short *timerp;
+       uint tmp;
+
+       timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE3);
+
+       while (usec > 0) {
+               if (usec > 65000)
+                       tmp = 65000;
+               else
+                       tmp = usec;
+               usec = usec - tmp;
+
+               /* Set up TIMER 3 as timebase clock */
+               timerp[MCFTIMER_PCSR] = MCFTIMER_PCSR_OVW;
+               timerp[MCFTIMER_PMR] = 0;
+               /* set period to 1 us */
+               timerp[MCFTIMER_PCSR] =
+#ifdef CONFIG_M5271
+                       (6 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
+#else /* !CONFIG_M5271 */
+                       (5 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
+#endif /* CONFIG_M5271 */
+
+               timerp[MCFTIMER_PMR] = tmp;
+               while (timerp[MCFTIMER_PCNTR] > 0);
+       }
 }
 
 void timer_init (void)
@@ -139,7 +175,11 @@ void timer_init (void)
        timerp[MCFTIMER_PCSR] = MCFTIMER_PCSR_OVW;
        timerp[MCFTIMER_PMR] = lastinc = 0;
        timerp[MCFTIMER_PCSR] =
+#ifdef CONFIG_M5271
+               (6 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
+#else /* !CONFIG_M5271 */
                (5 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
+#endif /* CONFIG_M5271 */
 }
 
 void set_timer (ulong t)
@@ -171,3 +211,105 @@ void wait_ticks (unsigned long ticks)
        while (get_timer (0) < ticks);
 }
 #endif
+
+
+#if defined(CONFIG_M5249)
+/*
+ * We use timer 1 which is running with a period of 1 us
+ */
+void udelay(unsigned long usec)
+{
+       volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE1);
+       uint start, now, tmp;
+
+       while (usec > 0) {
+               if (usec > 65000)
+                       tmp = 65000;
+               else
+                       tmp = usec;
+               usec = usec - tmp;
+
+               /* Set up TIMER 1 as timebase clock */
+               timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
+               timerp->timer_tcn = 0;
+               /* set period to 1 us */
+               /* on m5249 the system clock is (cpu_clk / 2) -> divide by 2000000 */
+               timerp->timer_tmr = (((CFG_CLK / 2000000) - 1)  << 8) | MCFTIMER_TMR_CLK1 |
+                                    MCFTIMER_TMR_FREERUN | MCFTIMER_TMR_ENABLE;
+
+               start = now = timerp->timer_tcn;
+               while (now < start + tmp)
+                       now = timerp->timer_tcn;
+       }
+}
+
+void mcf_timer_interrupt (void * not_used){
+       volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE2);
+
+       /* check for timer 2 interrupts */
+       if ((mbar_readLong(MCFSIM_IPR) & 0x00000400) == 0) {
+               return;
+       }
+
+       /* reset timer */
+       timerp->timer_ter = MCFTIMER_TER_CAP | MCFTIMER_TER_REF;
+       timestamp ++;
+}
+
+void timer_init (void) {
+       volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE2);
+
+       timestamp = 0;
+
+       /* Set up TIMER 2 as clock */
+       timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
+
+       /* initialize and enable timer 2 interrupt */
+       irq_install_handler (31, mcf_timer_interrupt, 0);
+       mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
+       mbar_writeByte(MCFSIM_TIMER2ICR, MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3);
+
+       timerp->timer_tcn = 0;
+       timerp->timer_trr = 1000;       /* Interrupt every ms */
+       /* set a period of 1us, set timer mode to restart and enable timer and interrupt */
+       /* on m5249 the system clock is (cpu_clk / 2) -> divide by 2000000 */
+       timerp->timer_tmr = (((CFG_CLK / 2000000) - 1)  << 8) | MCFTIMER_TMR_CLK1 |
+               MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENORI | MCFTIMER_TMR_ENABLE;
+}
+
+void reset_timer (void)
+{
+       timestamp = 0;
+}
+
+ulong get_timer (ulong base)
+{
+       return (timestamp - base);
+}
+
+void set_timer (ulong t)
+{
+       timestamp = t;
+}
+#endif
+
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On M68K it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+       return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On M68K it returns the number of timer ticks per second.
+ */
+ulong get_tbclk (void)
+{
+       ulong tbclk;
+       tbclk = CFG_HZ;
+       return tbclk;
+}