;
; Startup code for cc65 (Plus/4 version)
-;
-; This must be the *first* file on the linker command line
;
.export _exit
- .import initlib, donelib
- .import push0, _main, zerobss
-
- .include "plus4.inc"
- .include "../cbm/cbm.inc"
-
-; ------------------------------------------------------------------------
-; Define and export the ZP variables for the C64 runtime
+ .export brk_jmp
+ .export __STARTUP__ : absolute = 1 ; Mark as startup
- .exportzp sp, sreg, regsave
- .exportzp ptr1, ptr2, ptr3, ptr4
- .exportzp tmp1, tmp2, tmp3, tmp4
- .exportzp regbank, zpspace
+ .import callirq_y, initlib, donelib
+ .import callmain, zerobss
+ .import __INTERRUPTOR_COUNT__
+ .import __RAM_START__, __RAM_SIZE__ ; Linker generated
+ .import __STACKSIZE__ ; Linker generated
+ .importzp ST
-.zeropage
+ .include "zeropage.inc"
+ .include "plus4.inc"
-zpstart = *
-sp: .res 2 ; Stack pointer
-sreg: .res 2 ; Secondary register/high 16 bit for longs
-regsave: .res 2 ; slot to save/restore (E)AX into
-ptr1: .res 2
-ptr2: .res 2
-ptr3: .res 2
-ptr4: .res 2
-tmp1: .res 1
-tmp2: .res 1
-tmp3: .res 1
-tmp4: .res 1
-regbank: .res 6 ; 6 byte register bank
-zpspace = * - zpstart ; Zero page space allocated
+; ------------------------------------------------------------------------
+; Constants
-.code
+IRQInd = $500 ; JMP $0000 - used as indirect IRQ vector
; ------------------------------------------------------------------------
-; BASIC header with a SYS call
+; Startup code
- .org $0FFF
- .word Head ; Load address
-Head: .word @Next
- .word 1000 ; Line number
- .byte $9E,"4109" ; SYS 4109
- .byte $00 ; End of BASIC line
-@Next: .word 0 ; BASIC end marker
- .reloc
+.segment "STARTUP"
-; ------------------------------------------------------------------------
-; Actual code
+Start:
+; Save the zero page locations we need
+
+ sei ; No interrupts since we're banking out the ROM
+ sta ENABLE_RAM
ldx #zpspace-1
L1: lda sp,x
- sta zpsave,x ; save the zero page locations we need
- dex
+ sta zpsave,x
+ dex
bpl L1
+ sta ENABLE_ROM
+ cli
-; Close open files
+; Switch to second charset
- jsr CLRCH
+ lda #14
+ jsr $FFD2 ; BSOUT
-; Switch to second charset
+; Save system stuff and setup the stack. The stack starts at the top of the
+; usable RAM.
- lda #14
- jsr BSOUT
+ tsx
+ stx spsave ; save system stk ptr
-; Clear the BSS data
+ lda #<(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
+ sta sp
+ lda #>(__RAM_START__ + __RAM_SIZE__ + __STACKSIZE__)
+ sta sp+1
- jsr zerobss
+; Setup the IRQ vector in the banked RAM and switch off the ROM
-; Save system stuff and setup the stack
+ ldx #<IRQ
+ ldy #>IRQ
+ sei ; No ints, handler not yet in place
+ sta ENABLE_RAM
+ stx $FFFE ; Install interrupt handler
+ sty $FFFF
+ cli ; Allow interrupts
- tsx
- stx spsave ; save system stk ptr
+; Clear the BSS data
- sec
- jsr MEMTOP ; Get top memory
- cpy #$80 ; We can only use the low 32K :-(
- bcc MemOk
- ldy #$80
- ldx #$00
-MemOk: stx sp
- sty sp+1 ; set argument stack ptr
+ jsr zerobss
-; Call module constructors
+; Initialize irqcount, which means that from now own custom linked in IRQ
+; handlers (via condes) will be called.
+
+ lda #.lobyte(__INTERRUPTOR_COUNT__*2)
+ sta irqcount
- jsr initlib
+; Call module constructors
-; Pass an empty command line
+ jsr initlib
- jsr push0 ; argc
- jsr push0 ; argv
+; Push arguments and call main()
- ldy #4 ; Argument size
- jsr _main ; call the users code
+ jsr callmain
-; Call module destructors. This is also the _exit entry.
+; Back from main (this is also the _exit entry). Run module destructors.
-_exit: jsr donelib ; Run module destructors
+_exit: pha ; Save the return code
+ jsr donelib ; Run module destructors
-; Restore system stuff
+; Disable chained IRQ handlers
- ldx spsave
- txs
+ lda #0
+ sta irqcount ; Disable custom IRQ handlers
; Copy back the zero page stuff
- ldx #zpspace-1
+ ldx #zpspace-1
L2: lda zpsave,x
- sta sp,x
- dex
+ sta sp,x
+ dex
bpl L2
-; Reset changed vectors
+; Place the program return code into ST
+
+ pla
+ sta ST
+
+; Restore the stack pointer
+
+ ldx spsave
+ txs
+
+; Enable the ROM and return to BASIC
- jmp RESTOR
+ sta ENABLE_ROM
+ rts
+; ------------------------------------------------------------------------
+; IRQ handler. The handler in the ROM enables the kernal and jumps to
+; $CE00, where the ROM code checks for a BRK or IRQ and branches via the
+; indirect vectors at $314/$316.
+; To make our stub as fast as possible, we skip the whole part of the ROM
+; handler and jump to the indirect vectors directly. We do also call our
+; own interrupt handlers if we have any, so they need not use $314.
+
+.segment "LOWCODE"
+
+IRQ: cld ; Just to be sure
+ pha
+ txa
+ pha
+ tya
+ pha
+ tsx ; Get the stack pointer
+ lda $0104,x ; Get the saved status register
+ and #$10 ; Test for BRK bit
+ bne dobreak
+
+; It's an IRQ and RAM is enabled. If we have handlers, call them. We will use
+; a flag here instead of loading __INTERRUPTOR_COUNT__ directly, since the
+; condes function is not reentrant. The irqcount flag will be set/reset from
+; the main code, to avoid races.
+
+ ldy irqcount
+ beq @L1
+ jsr callirq_y ; Call the IRQ functions
+
+; Since the ROM handler will end with an RTI, we have to fake an IRQ return
+; on stack, so we get control of the CPU after the ROM handler and can switch
+; back to RAM.
+
+@L1: lda #>irq_ret ; Push new return address
+ pha
+ lda #<irq_ret
+ pha
+ php ; Push faked IRQ frame on stack
+ pha ; Push faked A register
+ pha ; Push faked X register
+ pha ; Push faked Y register
+ sta ENABLE_ROM ; Switch to ROM
+ jmp (IRQVec) ; Jump indirect to kernal irq handler
+
+irq_ret:
+ sta ENABLE_RAM ; Switch back to RAM
+ pla
+ tay
+ pla
+ tax
+ pla
+ rti
+
+dobreak:
+ lda brk_jmp+2 ; Check high byte of address
+ beq nohandler
+ jmp brk_jmp ; Jump to the handler
+
+; No break handler installed, jump to ROM
+
+nohandler:
+ sta ENABLE_ROM
+ jmp (BRKVec) ; Jump indirect to the break vector
+
+; ------------------------------------------------------------------------
+; Data
.data
-zpsave: .res zpspace
-.bss
-spsave: .res 1
+; BRK handling
+brk_jmp: jmp $0000
+
+spsave: .res 1
+
+irqcount: .byte 0
+
+.segment "ZPSAVE"
+
+zpsave: .res zpspace
projects / cc65 / blobdiff