]> git.sur5r.net Git - u-boot/blobdiff - nand_spl/nand_boot_fsl_elbc.c
arm, i2c: added support for the TWSI I2C Interface
[u-boot] / nand_spl / nand_boot_fsl_elbc.c
index 0d2378ee894d29d084fe19ab7bcd1c684ff28834..0d0c44e1e366d3343b8b5e14bfbe6fbe122f8d20 100644 (file)
@@ -33,7 +33,7 @@
 
 static void nand_wait(void)
 {
-       lbus83xx_t *regs = (lbus83xx_t *)(CFG_IMMR + 0x5000);
+       fsl_lbus_t *regs = (fsl_lbus_t *)(CONFIG_SYS_IMMR + 0x5000);
 
        for (;;) {
                uint32_t status = in_be32(&regs->ltesr);
@@ -50,8 +50,8 @@ static void nand_wait(void)
 
 static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
 {
-       lbus83xx_t *regs = (lbus83xx_t *)(CFG_IMMR + 0x5000);
-       uchar *buf = (uchar *)CFG_NAND_BASE;
+       fsl_lbus_t *regs = (fsl_lbus_t *)(CONFIG_SYS_IMMR + 0x5000);
+       uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
        int large = in_be32(&regs->bank[0].or) & OR_FCM_PGS;
        int block_shift = large ? 17 : 14;
        int block_size = 1 << block_shift;
@@ -133,18 +133,21 @@ void nand_boot(void)
 {
        __attribute__((noreturn)) void (*uboot)(void);
 
-       udelay(1000000);
-
        /*
         * Load U-Boot image from NAND into RAM
         */
-       nand_load(CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE,
-                 (uchar *)CFG_NAND_U_BOOT_DST);
+       nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
+                 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
 
        /*
         * Jump to U-Boot image
         */
        puts("transfering control\n");
-       uboot = (void *)CFG_NAND_U_BOOT_START;
+       /*
+        * Clean d-cache and invalidate i-cache, to
+        * make sure that no stale data is executed.
+        */
+       flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
+       uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
        uboot();
 }