ppc4xx: Big lwmon5 board support rework/update

[u-boot] / post / board / lwmon5 / dsp.c

diff --git a/post/board/lwmon5/dsp.c b/post/board/lwmon5/dsp.c
index 0e6d9084a319b04d3f93b63d921ad6bbe9cde591..913cd975916253c8b1e304cbadb489f92c7af511 100644 (file)
--- a/post/board/lwmon5/dsp.c
+++ b/post/board/lwmon5/dsp.c
@@ -33,20 +33,37 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define DSP_STATUS_REG 0xC4000008
+#define DSP_STATUS_REG         0xC4000008
+#define FPGA_STATUS_REG                0xC400000C
 
 int dsp_post_test(int flags)
 {
+       uint   old_value;
        uint   read_value;
        int    ret;
 
+       /* momorize fpga status */
+       old_value = in_be32((void *)FPGA_STATUS_REG);
+       /* enable outputs */
+       out_be32((void *)FPGA_STATUS_REG, 0x30);
+
+       /* generate sync signal */
+       out_be32((void *)DSP_STATUS_REG, 0x300);
+       udelay(5);
+       out_be32((void *)DSP_STATUS_REG, 0);
+       udelay(500);
+
+       /* read status */
        ret = 0;
        read_value = in_be32((void *)DSP_STATUS_REG) & 0x3;
-       if (read_value != 0x3) {
+       if (read_value != 0x03) {
                post_log("\nDSP status read %08X\n", read_value);
                ret = 1;
        }
 
+       /* restore fpga status */
+       out_be32((void *)FPGA_STATUS_REG, old_value);
+
        return ret;
 }