asm-generic/unaligned.h: dynamic default unaligned accesses

[u-boot] / post / lib_ppc / srawi.c

diff --git a/post/lib_ppc/srawi.c b/post/lib_ppc/srawi.c
index 8c70007c548ee93925f44980da23d04d5bf8ced7..be153aded21fa9f4e2685a22834022066e534c25 100644 (file)
--- a/post/lib_ppc/srawi.c
+++ b/post/lib_ppc/srawi.c
@@ -35,7 +35,7 @@
 #include <post.h>
 #include "cpu_asm.h"
 
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
 
 extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op);
 extern ulong cpu_post_makecr (long v);
@@ -49,13 +49,13 @@ static struct cpu_post_srawi_s
 } cpu_post_srawi_table[] =
 {
     {
-       OP_SRAWI,
+       OP_SRAWI,
        0x8000,
        3,
        0x1000
     },
     {
-       OP_SRAWI,
+       OP_SRAWI,
        0x80000000,
        3,
        0xf0000000
@@ -79,7 +79,7 @@ int cpu_post_test_srawi (void)
            unsigned int reg0 = (reg + 0) % 32;
            unsigned int reg1 = (reg + 1) % 32;
            unsigned int stk = reg < 16 ? 31 : 15;
-           unsigned long code[] =
+           unsigned long code[] =
            {
                ASM_STW(stk, 1, -4),
                ASM_ADDI(stk, 1, -16),
@@ -96,7 +96,7 @@ int cpu_post_test_srawi (void)
                ASM_LWZ(stk, 1, -4),
                ASM_BLR,
            };
-           unsigned long codecr[] =
+           unsigned long codecr[] =
            {
                ASM_STW(stk, 1, -4),
                ASM_ADDI(stk, 1, -16),
@@ -118,26 +118,26 @@ int cpu_post_test_srawi (void)
 
            if (ret == 0)
            {
-               cr = 0;
-               cpu_post_exec_21 (code, & cr, & res, test->op1);
+               cr = 0;
+               cpu_post_exec_21 (code, & cr, & res, test->op1);
 
-               ret = res == test->res && cr == 0 ? 0 : -1;
+               ret = res == test->res && cr == 0 ? 0 : -1;
 
-               if (ret != 0)
-               {
+               if (ret != 0)
+               {
                    post_log ("Error at srawi test %d !\n", i);
-               }
+               }
            }
 
            if (ret == 0)
            {
-               cpu_post_exec_21 (codecr, & cr, & res, test->op1);
+               cpu_post_exec_21 (codecr, & cr, & res, test->op1);
 
-               ret = res == test->res &&
+               ret = res == test->res &&
                      (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
 
-               if (ret != 0)
-               {
+               if (ret != 0)
+               {
                    post_log ("Error at srawi test %d !\n", i);
                }
            }
@@ -145,7 +145,7 @@ int cpu_post_test_srawi (void)
     }
 
     if (flag)
-       enable_interrupts();
+       enable_interrupts();
 
     return ret;
 }