-static int MemAccess (CodeSeg* S, unsigned From, unsigned To, const char* Arg)
-/* Checks a range of code entries if there are any memory accesses to Arg.
- * Note: This function is not 100% safe, because there is more than one way
- * to express a memory location ("foo" and "foo+0" comes to mind) and there
- * may be other accesses through pointers. For the code generated by cc65 and
- * for the purpose of the caller (OptPushPop) it is assumed to be safe enough
- * however.
- */
+static int MemAccess (CodeSeg* S, unsigned From, unsigned To, const CodeEntry* N)
+/* Checks a range of code entries if there are any memory accesses to N->Arg */
{
+ /* Get the length of the argument */
+ unsigned NLen = strlen (N->Arg);
+
+ /* What to check for? */
+ enum {
+ None = 0x00,
+ Base = 0x01, /* Check for location without "+1" */
+ Word = 0x02, /* Check for location with "+1" added */
+ } What = None;
+
+
+ /* If the argument of N is a zero page location that ends with "+1", we
+ * must also check for word accesses to the location without +1.
+ */
+ if (N->AM == AM65_ZP && NLen > 2 && strcmp (N->Arg + NLen - 2, "+1") == 0) {
+ What |= Base;
+ }
+
+ /* If the argument is zero page indirect, we must also check for accesses
+ * to "arg+1"
+ */
+ if (N->AM == AM65_ZP_INDY || N->AM == AM65_ZPX_IND || N->AM == AM65_ZP_IND) {
+ What |= Word;
+ }
+
/* Walk over all code entries */
while (From <= To) {
/* Get the next entry */
CodeEntry* E = CS_GetEntry (S, From);
- /* For simplicity, we just check if there is an argument and if this
- * argument equals Arg.
+ /* Check if there is an argument and if this argument equals Arg in
+ * some variants.
*/
- if (E->Arg && strcmp (E->Arg, Arg) == 0) {
- /* Found an access */
- return 1;
+ if (E->Arg[0] != '\0') {
+
+ unsigned ELen;
+
+ if (strcmp (E->Arg, N->Arg) == 0) {
+ /* Found an access */
+ return 1;
+ }
+
+ ELen = strlen (E->Arg);
+ if ((What & Base) != 0) {
+ if (ELen == NLen - 2 && strncmp (E->Arg, N->Arg, NLen-2) == 0) {
+ /* Found an access */
+ return 1;
+ }
+ }
+
+ if ((What & Word) != 0) {
+ if (ELen == NLen + 2 && strncmp (E->Arg, N->Arg, NLen) == 0 &&
+ E->Arg[NLen] == '+' && E->Arg[NLen+1] == '1') {
+ /* Found an access */
+ return 1;
+ }
+ }
}
/* Next entry */
/* Get next entry */
E2 = CS_GetNextEntry (S, I);
- /* Check if we have a jump or branch, and a matching label, which
- * is not attached to the jump itself
+ /* Check if we have a jump or branch without a label attached, and
+ * a jump target, which is not attached to the jump itself
*/
- if (E2 != 0 &&
+ if (E2 != 0 &&
(E2->Info & OF_UBRA) != 0 &&
- E2->JumpTo &&
+ !CE_HasLabel (E2) &&
+ E2->JumpTo &&
E2->JumpTo->Owner != E2) {
/* Get the entry preceeding the branch target */
goto NextEntry;
}
+ /* The entry preceeding the branch target may not be the branch
+ * insn.
+ */
+ if (T1 == E2) {
+ goto NextEntry;
+ }
+
/* Get the entry preceeding the jump */
E1 = CS_GetEntry (S, I);
CS_DelEntry (S, I+1);
/* Remember, we had changes */
- ++Changes;
+ ++Changes;
} else if ((BC == BC_EQ && E->Num == 0) ||
(BC == BC_NE && E->Num != 0) ||
*/
{
unsigned Changes = 0;
+ unsigned I;
/* Generate register info for this step */
CS_GenRegInfo (S);
/* Walk over the entries */
- unsigned I = 0;
+ I = 0;
while (I < CS_GetEntryCount (S)) {
CodeEntry* N;
/* Check which sort of load or transfer it is */
unsigned R;
switch (E->OPC) {
- case OP65_DEA:
- case OP65_INA:
- case OP65_LDA:
+ case OP65_DEA:
+ case OP65_INA:
+ case OP65_LDA:
case OP65_TXA:
case OP65_TYA: R = REG_A; break;
- case OP65_DEX:
- case OP65_INX:
- case OP65_LDX:
+ case OP65_DEX:
+ case OP65_INX:
+ case OP65_LDX:
case OP65_TAX: R = REG_X; break;
- case OP65_DEY:
- case OP65_INY:
+ case OP65_DEY:
+ case OP65_INY:
case OP65_LDY:
case OP65_TAY: R = REG_Y; break;
default: goto NextEntry; /* OOPS */
if ((GetRegInfo (S, I+1, R) & R) == 0) {
/* Register value is not used, remove the load */
- CS_DelEntry (S, I);
+ CS_DelEntry (S, I);
- /* Remember, we had changes. Account the deleted entry in I. */
- ++Changes;
- --I;
+ /* Remember, we had changes. Account the deleted entry in I. */
+ ++Changes;
+ --I;
}
}
In->RegX == In->RegA &&
E->AM != AM65_ABSY &&
E->AM != AM65_ZPY) {
- /* Use the A register instead */
+ /* Use the A register instead */
CE_ReplaceOPC (E, OP65_STA);
}
break;
!CE_UseLoadFlags (N)) {
/* Value is identical and not followed by a branch */
Delete = 1;
- }
+ }
break;
case OP65_TAY:
StoreEntry->AM == AM65_ZP) &&
(StoreEntry->AM != AM65_ZP ||
(StoreEntry->Chg & UsedRegs) == 0) &&
- !MemAccess (S, Xfer+1, Store-1, StoreEntry->Arg)) {
+ !MemAccess (S, Xfer+1, Store-1, StoreEntry)) {
/* Generate the replacement store insn */
CodeEntry* X = 0;
(LoadEntry->AM == AM65_ABS ||
LoadEntry->AM == AM65_ZP ||
LoadEntry->AM == AM65_IMM) &&
- !MemAccess (S, Load+1, Xfer-1, LoadEntry->Arg)) {
+ !MemAccess (S, Load+1, Xfer-1, LoadEntry)) {
/* Generate the replacement load insn */
CodeEntry* X = 0;
unsigned Changes = 0;
unsigned Push = 0; /* Index of push insn */
unsigned Pop = 0; /* Index of pop insn */
+ unsigned ChgA = 0; /* Flag for A changed */
enum {
Searching,
FoundPush,
if (E->OPC == OP65_PHA) {
/* Found start of sequence */
Push = I;
+ ChgA = 0;
State = FoundPush;
}
break;
if (E->OPC == OP65_PHA) {
/* Inner push/pop, restart */
Push = I;
+ ChgA = 0;
} else if (E->OPC == OP65_PLA) {
/* Found a matching pop */
Pop = I;
/* Go into searching mode again */
State = Searching;
}
+ } else if (E->Chg & REG_A) {
+ ChgA = 1;
}
break;
* later, we may replace the PHA by the store and remove
* pla if several other conditions are met.
* - If this instruction is not a conditional branch, and A
- * is unused later, we may remove PHA and PLA.
+ * is either unused later, or not changed by the code
+ * between push and pop, we may remove PHA and PLA.
*/
if (E->OPC == OP65_STA &&
!RegAUsed (S, I+1) &&
- !MemAccess (S, Push+1, Pop-1, E->Arg)) {
+ !MemAccess (S, Push+1, Pop-1, E)) {
/* Insert a STA after the PHA */
X = NewCodeEntry (E->OPC, E->AM, E->Arg, E->JumpTo, E->LI);
++Changes;
} else if ((E->Info & OF_CBRA) == 0 &&
- !RegAUsed (S, I)) {
+ (!RegAUsed (S, I) || !ChgA)) {
/* We can remove the PHA and PLA instructions */
CS_DelEntry (S, Pop);
/* Get next entry */
CodeEntry* E = CS_GetEntry (S, I);
- /* Get a pointer to the output registers of the insn */
+ /* Get pointers to the input and output registers of the insn */
const RegContents* Out = &E->RI->Out;
+ const RegContents* In = &E->RI->In;
/* Argument for LDn and flag */
const char* Arg = 0;
}
break;
- case OP65_ADC:
- case OP65_ASL:
case OP65_EOR:
- case OP65_LSR:
- case OP65_SBC:
if (RegValIsKnown (Out->RegA)) {
/* Accu op zp with known contents */
Arg = MakeHexArg (Out->RegA);
}
break;
+ case OP65_ADC:
+ case OP65_SBC:
+ /* If this is an operation with an immediate operand of zero,
+ * and the register is zero, the operation won't give us any
+ * results we don't already have (including the flags), so
+ * remove it. Something like this is generated as a result of
+ * a compare where parts of the values are known to be zero.
+ */
+ if (In->RegA == 0 && CE_IsKnownImm (E, 0x00)) {
+ /* 0-0 or 0+0 -> remove */
+ CS_DelEntry (S, I);
+ ++Changes;
+ }
+ break;
+
case OP65_AND:
if (CE_IsKnownImm (E, 0xFF)) {
/* AND with 0xFF, remove */
CS_DelEntry (S, I);
++Changes;
+ } else if (CE_IsKnownImm (E, 0x00)) {
+ /* AND with 0x00, replace by lda #$00 */
+ Arg = MakeHexArg (0x00);
} else if (RegValIsKnown (Out->RegA)) {
/* Accu AND zp with known contents */
Arg = MakeHexArg (Out->RegA);
+ } else if (In->RegA == 0xFF) {
+ /* AND but A contains 0xFF - replace by lda */
+ CE_ReplaceOPC (E, OP65_LDA);
+ ++Changes;
}
break;
/* ORA with zero, remove */
CS_DelEntry (S, I);
++Changes;
+ } else if (CE_IsKnownImm (E, 0xFF)) {
+ /* ORA with 0xFF, replace by lda #$ff */
+ Arg = MakeHexArg (0xFF);
} else if (RegValIsKnown (Out->RegA)) {
/* Accu AND zp with known contents */
Arg = MakeHexArg (Out->RegA);
+ } else if (In->RegA == 0) {
+ /* ORA but A contains 0x00 - replace by lda */
+ CE_ReplaceOPC (E, OP65_LDA);
+ ++Changes;
}
break;
+/*****************************************************************************/
+/* Optimize indirect loads */
+/*****************************************************************************/
+
+
+
+unsigned OptIndLoads1 (CodeSeg* S)
+/* Change
+ *
+ * lda (zp),y
+ *
+ * into
+ *
+ * lda (zp,x)
+ *
+ * provided that x and y are both zero.
+ */
+{
+ unsigned Changes = 0;
+ unsigned I;
+
+ /* Generate register info for this step */
+ CS_GenRegInfo (S);
+
+ /* Walk over the entries */
+ I = 0;
+ while (I < CS_GetEntryCount (S)) {
+
+ /* Get next entry */
+ CodeEntry* E = CS_GetEntry (S, I);
+
+ /* Check if it's what we're looking for */
+ if (E->OPC == OP65_LDA &&
+ E->AM == AM65_ZP_INDY &&
+ E->RI->In.RegY == 0 &&
+ E->RI->In.RegX == 0) {
+
+ /* Replace by the same insn with other addressing mode */
+ CodeEntry* X = NewCodeEntry (E->OPC, AM65_ZPX_IND, E->Arg, 0, E->LI);
+ CS_InsertEntry (S, X, I+1);
+
+ /* Remove the old insn */
+ CS_DelEntry (S, I);
+ ++Changes;
+ }
+
+ /* Next entry */
+ ++I;
+
+ }
+
+ /* Free register info */
+ CS_FreeRegInfo (S);
+
+ /* Return the number of changes made */
+ return Changes;
+}
+
+
+
+unsigned OptIndLoads2 (CodeSeg* S)
+/* Change
+ *
+ * lda (zp,x)
+ *
+ * into
+ *
+ * lda (zp),y
+ *
+ * provided that x and y are both zero.
+ */
+{
+ unsigned Changes = 0;
+ unsigned I;
+
+ /* Generate register info for this step */
+ CS_GenRegInfo (S);
+
+ /* Walk over the entries */
+ I = 0;
+ while (I < CS_GetEntryCount (S)) {
+
+ /* Get next entry */
+ CodeEntry* E = CS_GetEntry (S, I);
+
+ /* Check if it's what we're looking for */
+ if (E->OPC == OP65_LDA &&
+ E->AM == AM65_ZPX_IND &&
+ E->RI->In.RegY == 0 &&
+ E->RI->In.RegX == 0) {
+
+ /* Replace by the same insn with other addressing mode */
+ CodeEntry* X = NewCodeEntry (E->OPC, AM65_ZP_INDY, E->Arg, 0, E->LI);
+ CS_InsertEntry (S, X, I+1);
+
+ /* Remove the old insn */
+ CS_DelEntry (S, I);
+ ++Changes;
+ }
+
+ /* Next entry */
+ ++I;
+
+ }
+
+ /* Free register info */
+ CS_FreeRegInfo (S);
+
+ /* Return the number of changes made */
+ return Changes;
+}
+
+
+
projects / cc65 / blobdiff