Merge remote-tracking branch 'upstream/master' into a5200

[cc65] / src / cc65 / coptind.h

diff --git a/src/cc65/coptind.h b/src/cc65/coptind.h
index ae72b1fbbf98b4191d14c0ec048423c99d426cca..509ae00809d5bfb917d94354605355744fd8cc66 100644 (file)
--- a/src/cc65/coptind.h
+++ b/src/cc65/coptind.h
@@ -1,15 +1,15 @@
 /*****************************************************************************/
 /*                                                                           */
-/*                                coptind.h                                 */
+/*                                 coptind.h                                 */
 /*                                                                           */
-/*             Environment independent low level optimizations              */
+/*              Environment independent low level optimizations              */
 /*                                                                           */
 /*                                                                           */
 /*                                                                           */
-/* (C) 2001-2003 Ullrich von Bassewitz                                       */
-/*               Römerstrasse 52                                             */
-/*               D-70794 Filderstadt                                         */
-/* EMail:        uz@cc65.org                                                 */
+/* (C) 2001-2009, Ullrich von Bassewitz                                      */
+/*                Roemerstrasse 52                                           */
+/*                D-70794 Filderstadt                                        */
+/* EMail:         uz@cc65.org                                                */
 /*                                                                           */
 /*                                                                           */
 /* This software is provided 'as-is', without any expressed or implied       */
@@ -44,7 +44,7 @@
 
 
 /*****************************************************************************/
-/*                                  Code                                    */
+/*                                   Code                                    */
 /*****************************************************************************/
 
 
@@ -77,19 +77,35 @@ unsigned OptRTS (CodeSeg* S);
  * label, the dead code elimination should take care of it.
  */
 
-unsigned OptJumpTarget (CodeSeg* S);
+unsigned OptJumpTarget1 (CodeSeg* S);
 /* If the instruction preceeding an unconditional branch is the same as the
  * instruction preceeding the jump target, the jump target may be moved
  * one entry back. This is a size optimization, since the instruction before
  * the branch gets removed.
  */
 
-unsigned OptCondBranches (CodeSeg* S);
+unsigned OptJumpTarget2 (CodeSeg* S);
+/* If a bcs jumps to a sec insn or a bcc jumps to clc, skip this insn, since
+ * it's job is already done.
+ */
+
+unsigned OptJumpTarget3 (CodeSeg* S);
+/* Jumps to load instructions of a register, that do already have the matching
+ * register contents may skip the load instruction, since it's job is already
+ * done.
+ */
+
+unsigned OptCondBranches1 (CodeSeg* S);
 /* If an immidiate load of a register is followed by a conditional jump that
  * is never taken because the load of the register sets the flags in such a
  * manner, remove the conditional branch.
  */
 
+unsigned OptCondBranches2 (CodeSeg* S);
+/* If on entry to a "rol a" instruction the accu is zero, and a beq/bne follows,
+ * we can remove the rol and branch on the state of the carry.
+ */
+
 unsigned OptUnusedLoads (CodeSeg* S);
 /* Remove loads of registers where the value loaded is not used later. */
 
@@ -110,6 +126,16 @@ unsigned OptTransfers2 (CodeSeg* S);
  * register if possible.
  */
 
+unsigned OptTransfers3 (CodeSeg* S);
+/* Replace a register transfer followed by a store of the second register by a
+ * store of the first register if this is possible.
+ */
+
+unsigned OptTransfers4 (CodeSeg* S);
+/* Replace a load of a register followed by a transfer insn of the same register
+ * by a load of the second register if possible.
+ */
+
 unsigned OptPushPop (CodeSeg* S);
 /* Remove a PHA/PLA sequence were A is not used later */
 
@@ -121,10 +147,32 @@ unsigned OptPrecalc (CodeSeg* S);
 unsigned OptBranchDist (CodeSeg* S);
 /* Change branches for the distance needed. */
 
+unsigned OptIndLoads1 (CodeSeg* S);
+/* Change
+ *
+ *     lda      (zp),y
+ *
+ * into
+ *
+ *     lda      (zp,x)
+ *
+ * provided that x and y are both zero.
+ */
 
+unsigned OptIndLoads2 (CodeSeg* S);
+/* Change
+ *
+ *     lda      (zp,x)
+ *
+ * into
+ *
+ *     lda      (zp),y
+ *
+ * provided that x and y are both zero.
+ */
 
-/* End of coptind.h */
-#endif
 
 
+/* End of coptind.h */
 
+#endif