/* */
/* */
/* */
-/* (C) 2001 Ullrich von Bassewitz */
-/* Wacholderweg 14 */
-/* D-70597 Stuttgart */
+/* (C) 2001-2004 Ullrich von Bassewitz */
+/* Römerstraße 52 */
+/* D-70794 Filderstadt */
/* EMail: uz@cc65.org */
/* */
/* */
/* common */
#include "check.h"
+#include "cpu.h"
/* cc65 */
#include "codeinfo.h"
-/* Mapper table, mnemonic --> opcode */
-static const OPCDesc OPCTable[OPC_COUNT] = {
- { OPC_ADC, "adc", 0, REG_A, REG_A, OF_NONE },
- { OPC_AND, "and", 0, REG_A, REG_A, OF_NONE },
- { OPC_ASL, "asl", 0, REG_A, REG_A, OF_NONE },
- { OPC_BCC, "bcc", 2, REG_NONE, REG_NONE, OF_BRA },
- { OPC_BCS, "bcs", 2, REG_NONE, REG_NONE, OF_BRA },
- { OPC_BEQ, "beq", 2, REG_NONE, REG_NONE, OF_BRA },
- { OPC_BIT, "bit", 0, REG_A, REG_NONE, OF_NONE },
- { OPC_BMI, "bmi", 2, REG_NONE, REG_NONE, OF_BRA },
- { OPC_BNE, "bne", 2, REG_NONE, REG_NONE, OF_BRA },
- { OPC_BPL, "bpl", 2, REG_NONE, REG_NONE, OF_BRA },
- { OPC_BRA, "bra", 2, REG_NONE, REG_NONE, OF_BRA },
- { OPC_BRK, "brk", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_BVC, "bvc", 2, REG_NONE, REG_NONE, OF_BRA },
- { OPC_BVS, "bvs", 2, REG_NONE, REG_NONE, OF_BRA },
- { OPC_CLC, "clc", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_CLD, "cld", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_CLI, "cli", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_CLV, "clv", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_CMP, "cmp", 0, REG_A, REG_NONE, OF_NONE },
- { OPC_CPX, "cpx", 0, REG_X, REG_NONE, OF_NONE },
- { OPC_CPY, "cpy", 0, REG_Y, REG_NONE, OF_NONE },
- { OPC_DEA, "dea", 1, REG_A, REG_A, OF_NONE },
- { OPC_DEC, "dec", 0, REG_NONE, REG_NONE, OF_NONE },
- { OPC_DEX, "dex", 1, REG_X, REG_X, OF_NONE },
- { OPC_DEY, "dey", 1, REG_Y, REG_Y, OF_NONE },
- { OPC_EOR, "eor", 0, REG_A, REG_A, OF_NONE },
- { OPC_INA, "ina", 1, REG_A, REG_A, OF_NONE },
- { OPC_INC, "inc", 0, REG_NONE, REG_NONE, OF_NONE },
- { OPC_INX, "inx", 1, REG_X, REG_X, OF_NONE },
- { OPC_INY, "iny", 1, REG_Y, REG_Y, OF_NONE },
- { OPC_JCC, "jcc", 5, REG_NONE, REG_NONE, OF_BRA },
- { OPC_JCS, "jcs", 5, REG_NONE, REG_NONE, OF_BRA },
- { OPC_JEQ, "jeq", 5, REG_NONE, REG_NONE, OF_BRA },
- { OPC_JMI, "jmi", 5, REG_NONE, REG_NONE, OF_BRA },
- { OPC_JMP, "jmp", 3, REG_NONE, REG_NONE, OF_BRA },
- { OPC_JNE, "jne", 5, REG_NONE, REG_NONE, OF_BRA },
- { OPC_JPL, "jpl", 5, REG_NONE, REG_NONE, OF_BRA },
- { OPC_JSR, "jsr", 3, REG_NONE, REG_NONE, OF_NONE },
- { OPC_JVC, "jvc", 5, REG_NONE, REG_NONE, OF_BRA },
- { OPC_JVS, "jvs", 5, REG_NONE, REG_NONE, OF_BRA },
- { OPC_LDA, "lda", 0, REG_NONE, REG_A, OF_NONE },
- { OPC_LDX, "ldx", 0, REG_NONE, REG_X, OF_NONE },
- { OPC_LDY, "ldy", 0, REG_NONE, REG_Y, OF_NONE },
- { OPC_LSR, "lsr", 0, REG_A, REG_A, OF_NONE },
- { OPC_NOP, "nop", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_ORA, "ora", 0, REG_A, REG_A, OF_NONE },
- { OPC_PHA, "pha", 1, REG_A, REG_NONE, OF_NONE },
- { OPC_PHP, "php", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_PHX, "phx", 1, REG_X, REG_NONE, OF_NONE },
- { OPC_PHY, "phy", 1, REG_Y, REG_NONE, OF_NONE },
- { OPC_PLA, "pla", 1, REG_NONE, REG_A, OF_NONE },
- { OPC_PLP, "plp", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_PLX, "plx", 1, REG_NONE, REG_X, OF_NONE },
- { OPC_PLY, "ply", 1, REG_NONE, REG_Y, OF_NONE },
- { OPC_ROL, "rol", 0, REG_A, REG_A, OF_NONE },
- { OPC_ROR, "ror", 0, REG_A, REG_A, OF_NONE },
- { OPC_RTI, "rti", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_RTS, "rts", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_SBC, "sbc", 0, REG_A, REG_A, OF_NONE },
- { OPC_SEC, "sec", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_SED, "sed", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_SEI, "sei", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_STA, "sta", 0, REG_A, REG_NONE, OF_NONE },
- { OPC_STX, "stx", 0, REG_X, REG_NONE, OF_NONE },
- { OPC_STY, "sty", 0, REG_Y, REG_NONE, OF_NONE },
- { OPC_TAX, "tax", 1, REG_A, REG_X, OF_NONE },
- { OPC_TAY, "tay", 1, REG_A, REG_Y, OF_NONE },
- { OPC_TRB, "trb", 0, REG_A, REG_NONE, OF_NONE },
- { OPC_TSB, "tsb", 0, REG_A, REG_NONE, OF_NONE },
- { OPC_TSX, "tsx", 1, REG_NONE, REG_X, OF_NONE },
- { OPC_TXA, "txa", 1, REG_X, REG_A, OF_NONE },
- { OPC_TXS, "txs", 1, REG_X, REG_NONE, OF_NONE },
- { OPC_TYA, "tya", 1, REG_A, REG_A, OF_NONE },
+/* Opcode description table */
+const OPCDesc OPCTable[OP65_COUNT] = {
+
+ /* 65XX opcodes */
+ { OP65_ADC, /* opcode */
+ "adc", /* mnemonic */
+ 0, /* size */
+ REG_A, /* use */
+ REG_A, /* chg */
+ OF_SETF /* flags */
+ },
+ { OP65_AND, /* opcode */
+ "and", /* mnemonic */
+ 0, /* size */
+ REG_A, /* use */
+ REG_A, /* chg */
+ OF_SETF /* flags */
+ },
+ { OP65_ASL, /* opcode */
+ "asl", /* mnemonic */
+ 0, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_SETF | OF_NOIMP /* flags */
+ },
+ { OP65_BCC, /* opcode */
+ "bcc", /* mnemonic */
+ 2, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA /* flags */
+ },
+ { OP65_BCS, /* opcode */
+ "bcs", /* mnemonic */
+ 2, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA /* flags */
+ },
+ { OP65_BEQ, /* opcode */
+ "beq", /* mnemonic */
+ 2, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_ZBRA | OF_FBRA /* flags */
+ },
+ { OP65_BIT, /* opcode */
+ "bit", /* mnemonic */
+ 0, /* size */
+ REG_A, /* use */
+ REG_NONE, /* chg */
+ OF_SETF /* flags */
+ },
+ { OP65_BMI, /* opcode */
+ "bmi", /* mnemonic */
+ 2, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_FBRA /* flags */
+ },
+ { OP65_BNE, /* opcode */
+ "bne", /* mnemonic */
+ 2, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_ZBRA | OF_FBRA /* flags */
+ },
+ { OP65_BPL, /* opcode */
+ "bpl", /* mnemonic */
+ 2, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_FBRA /* flags */
+ },
+ { OP65_BRA, /* opcode */
+ "bra", /* mnemonic */
+ 2, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_UBRA /* flags */
+ },
+ { OP65_BRK, /* opcode */
+ "brk", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_BVC, /* opcode */
+ "bvc", /* mnemonic */
+ 2, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA /* flags */
+ },
+ { OP65_BVS, /* opcode */
+ "bvs", /* mnemonic */
+ 2, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA /* flags */
+ },
+ { OP65_CLC, /* opcode */
+ "clc", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_CLD, /* opcode */
+ "cld", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_CLI, /* opcode */
+ "cli", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_CLV, /* opcode */
+ "clv", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_CMP, /* opcode */
+ "cmp", /* mnemonic */
+ 0, /* size */
+ REG_A, /* use */
+ REG_NONE, /* chg */
+ OF_SETF | OF_CMP /* flags */
+ },
+ { OP65_CPX, /* opcode */
+ "cpx", /* mnemonic */
+ 0, /* size */
+ REG_X, /* use */
+ REG_NONE, /* chg */
+ OF_SETF | OF_CMP /* flags */
+ },
+ { OP65_CPY, /* opcode */
+ "cpy", /* mnemonic */
+ 0, /* size */
+ REG_Y, /* use */
+ REG_NONE, /* chg */
+ OF_SETF | OF_CMP /* flags */
+ },
+ { OP65_DEA, /* opcode */
+ "dea", /* mnemonic */
+ 1, /* size */
+ REG_A, /* use */
+ REG_A, /* chg */
+ OF_REG_INCDEC | OF_SETF /* flags */
+ },
+ { OP65_DEC, /* opcode */
+ "dec", /* mnemonic */
+ 0, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_SETF | OF_NOIMP /* flags */
+ },
+ { OP65_DEX, /* opcode */
+ "dex", /* mnemonic */
+ 1, /* size */
+ REG_X, /* use */
+ REG_X, /* chg */
+ OF_REG_INCDEC | OF_SETF /* flags */
+ },
+ { OP65_DEY, /* opcode */
+ "dey", /* mnemonic */
+ 1, /* size */
+ REG_Y, /* use */
+ REG_Y, /* chg */
+ OF_REG_INCDEC | OF_SETF /* flags */
+ },
+ { OP65_EOR, /* opcode */
+ "eor", /* mnemonic */
+ 0, /* size */
+ REG_A, /* use */
+ REG_A, /* chg */
+ OF_SETF /* flags */
+ },
+ { OP65_INA, /* opcode */
+ "ina", /* mnemonic */
+ 1, /* size */
+ REG_A, /* use */
+ REG_A, /* chg */
+ OF_REG_INCDEC | OF_SETF /* flags */
+ },
+ { OP65_INC, /* opcode */
+ "inc", /* mnemonic */
+ 0, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_SETF | OF_NOIMP /* flags */
+ },
+ { OP65_INX, /* opcode */
+ "inx", /* mnemonic */
+ 1, /* size */
+ REG_X, /* use */
+ REG_X, /* chg */
+ OF_REG_INCDEC | OF_SETF /* flags */
+ },
+ { OP65_INY, /* opcode */
+ "iny", /* mnemonic */
+ 1, /* size */
+ REG_Y, /* use */
+ REG_Y, /* chg */
+ OF_REG_INCDEC | OF_SETF /* flags */
+ },
+ { OP65_JCC, /* opcode */
+ "jcc", /* mnemonic */
+ 5, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_LBRA /* flags */
+ },
+ { OP65_JCS, /* opcode */
+ "jcs", /* mnemonic */
+ 5, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_LBRA /* flags */
+ },
+ { OP65_JEQ, /* opcode */
+ "jeq", /* mnemonic */
+ 5, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA /* flags */
+ },
+ { OP65_JMI, /* opcode */
+ "jmi", /* mnemonic */
+ 5, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_LBRA | OF_FBRA /* flags */
+ },
+ { OP65_JMP, /* opcode */
+ "jmp", /* mnemonic */
+ 3, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_UBRA | OF_LBRA /* flags */
+ },
+ { OP65_JNE, /* opcode */
+ "jne", /* mnemonic */
+ 5, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA /* flags */
+ },
+ { OP65_JPL, /* opcode */
+ "jpl", /* mnemonic */
+ 5, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_LBRA | OF_FBRA /* flags */
+ },
+ { OP65_JSR, /* opcode */
+ "jsr", /* mnemonic */
+ 3, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CALL /* flags */
+ },
+ { OP65_JVC, /* opcode */
+ "jvc", /* mnemonic */
+ 5, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_LBRA /* flags */
+ },
+ { OP65_JVS, /* opcode */
+ "jvs", /* mnemonic */
+ 5, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_CBRA | OF_LBRA /* flags */
+ },
+ { OP65_LDA, /* opcode */
+ "lda", /* mnemonic */
+ 0, /* size */
+ REG_NONE, /* use */
+ REG_A, /* chg */
+ OF_LOAD | OF_SETF /* flags */
+ },
+ { OP65_LDX, /* opcode */
+ "ldx", /* mnemonic */
+ 0, /* size */
+ REG_NONE, /* use */
+ REG_X, /* chg */
+ OF_LOAD | OF_SETF /* flags */
+ },
+ { OP65_LDY, /* opcode */
+ "ldy", /* mnemonic */
+ 0, /* size */
+ REG_NONE, /* use */
+ REG_Y, /* chg */
+ OF_LOAD | OF_SETF /* flags */
+ },
+ { OP65_LSR, /* opcode */
+ "lsr", /* mnemonic */
+ 0, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_SETF | OF_NOIMP /* flags */
+ },
+ { OP65_NOP, /* opcode */
+ "nop", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_ORA, /* opcode */
+ "ora", /* mnemonic */
+ 0, /* size */
+ REG_A, /* use */
+ REG_A, /* chg */
+ OF_SETF /* flags */
+ },
+ { OP65_PHA, /* opcode */
+ "pha", /* mnemonic */
+ 1, /* size */
+ REG_A, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_PHP, /* opcode */
+ "php", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_PHX, /* opcode */
+ "phx", /* mnemonic */
+ 1, /* size */
+ REG_X, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_PHY, /* opcode */
+ "phy", /* mnemonic */
+ 1, /* size */
+ REG_Y, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_PLA, /* opcode */
+ "pla", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_A, /* chg */
+ OF_SETF /* flags */
+ },
+ { OP65_PLP, /* opcode */
+ "plp", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_PLX, /* opcode */
+ "plx", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_X, /* chg */
+ OF_SETF /* flags */
+ },
+ { OP65_PLY, /* opcode */
+ "ply", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_Y, /* chg */
+ OF_SETF /* flags */
+ },
+ { OP65_ROL, /* opcode */
+ "rol", /* mnemonic */
+ 0, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_SETF | OF_NOIMP /* flags */
+ },
+ { OP65_ROR, /* opcode */
+ "ror", /* mnemonic */
+ 0, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_SETF | OF_NOIMP /* flags */
+ },
+ /* Mark RTI as "uses all registers but doesn't change them", so the
+ * optimizer won't remove preceeding loads.
+ */
+ { OP65_RTI, /* opcode */
+ "rti", /* mnemonic */
+ 1, /* size */
+ REG_AXY, /* use */
+ REG_NONE, /* chg */
+ OF_RET /* flags */
+ },
+ { OP65_RTS, /* opcode */
+ "rts", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_RET /* flags */
+ },
+ { OP65_SBC, /* opcode */
+ "sbc", /* mnemonic */
+ 0, /* size */
+ REG_A, /* use */
+ REG_A, /* chg */
+ OF_SETF /* flags */
+ },
+ { OP65_SEC, /* opcode */
+ "sec", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_SED, /* opcode */
+ "sed", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_SEI, /* opcode */
+ "sei", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_NONE /* flags */
+ },
+ { OP65_STA, /* opcode */
+ "sta", /* mnemonic */
+ 0, /* size */
+ REG_A, /* use */
+ REG_NONE, /* chg */
+ OF_STORE /* flags */
+ },
+ { OP65_STX, /* opcode */
+ "stx", /* mnemonic */
+ 0, /* size */
+ REG_X, /* use */
+ REG_NONE, /* chg */
+ OF_STORE /* flags */
+ },
+ { OP65_STY, /* opcode */
+ "sty", /* mnemonic */
+ 0, /* size */
+ REG_Y, /* use */
+ REG_NONE, /* chg */
+ OF_STORE /* flags */
+ },
+ { OP65_STZ, /* opcode */
+ "stz", /* mnemonic */
+ 0, /* size */
+ REG_NONE, /* use */
+ REG_NONE, /* chg */
+ OF_STORE /* flags */
+ },
+ { OP65_TAX, /* opcode */
+ "tax", /* mnemonic */
+ 1, /* size */
+ REG_A, /* use */
+ REG_X, /* chg */
+ OF_XFR | OF_SETF /* flags */
+ },
+ { OP65_TAY, /* opcode */
+ "tay", /* mnemonic */
+ 1, /* size */
+ REG_A, /* use */
+ REG_Y, /* chg */
+ OF_XFR | OF_SETF /* flags */
+ },
+ { OP65_TRB, /* opcode */
+ "trb", /* mnemonic */
+ 0, /* size */
+ REG_A, /* use */
+ REG_NONE, /* chg */
+ OF_SETF /* flags */
+ },
+ { OP65_TSB, /* opcode */
+ "tsb", /* mnemonic */
+ 0, /* size */
+ REG_A, /* use */
+ REG_NONE, /* chg */
+ OF_SETF /* flags */
+ },
+ { OP65_TSX, /* opcode */
+ "tsx", /* mnemonic */
+ 1, /* size */
+ REG_NONE, /* use */
+ REG_X, /* chg */
+ OF_XFR | OF_SETF /* flags */
+ },
+ { OP65_TXA, /* opcode */
+ "txa", /* mnemonic */
+ 1, /* size */
+ REG_X, /* use */
+ REG_A, /* chg */
+ OF_XFR | OF_SETF /* flags */
+ },
+ { OP65_TXS, /* opcode */
+ "txs", /* mnemonic */
+ 1, /* size */
+ REG_X, /* use */
+ REG_NONE, /* chg */
+ OF_XFR /* flags */
+ },
+ { OP65_TYA, /* opcode */
+ "tya", /* mnemonic */
+ 1, /* size */
+ REG_Y, /* use */
+ REG_A, /* chg */
+ OF_XFR | OF_SETF /* flags */
+ },
};
/*****************************************************************************/
-/* Code */
+/* Code */
/*****************************************************************************/
-static int Compare (const void* Key, const void* Desc)
-/* Compare function for bsearch */
+static int FindCmp (const void* Key, const void* Desc)
+/* Compare function for FindOpcode */
{
return strcmp (Key, ((OPCDesc*)Desc)->Mnemo);
}
-const OPCDesc* FindOpcode (const char* M)
+const OPCDesc* FindOP65 (const char* M)
/* Find the given opcode and return the opcode number. If the opcode was not
- * found, return OPC_INVALID.
+ * found, return NULL.
*/
{
unsigned I;
Mnemo[I] = '\0';
/* Search for the mnemonic in the table and return the result */
- return bsearch (Mnemo, OPCTable, OPC_COUNT, sizeof (OPCTable[0]), Compare);
+ return bsearch (Mnemo, OPCTable, OP65_COUNT,
+ sizeof (OPCTable[0]), FindCmp );
}
/* Get the opcode desc and check the size given there */
const OPCDesc* D = &OPCTable[OPC];
if (D->Size != 0) {
- return D->Size;
+ return D->Size;
}
/* Check the addressing mode. */
switch (AM) {
- case AM_IMP: return 1;
- case AM_ACC: return 1;
- case AM_IMM: return 2;
- case AM_ZP: return 2;
- case AM_ZPX: return 2;
- case AM_ABS: return 3;
- case AM_ABSX: return 3;
- case AM_ABSY: return 3;
- case AM_ZPX_IND: return 2;
- case AM_ZP_INDY: return 2;
- case AM_ZP_IND: return 2;
- default: FAIL ("Invalid addressing mode");
+ case AM65_IMP: return 1;
+ case AM65_ACC: return 1;
+ case AM65_IMM: return 2;
+ case AM65_ZP: return 2;
+ case AM65_ZPX: return 2;
+ case AM65_ABS: return 3;
+ case AM65_ABSX: return 3;
+ case AM65_ABSY: return 3;
+ case AM65_ZPX_IND: return 2;
+ case AM65_ZP_INDY: return 2;
+ case AM65_ZP_IND: return 2;
+ default:
+ Internal ("Invalid addressing mode");
+ return 0;
}
}
-const OPCDesc* GetOPCDesc (opc_t OPC)
-/* Get an opcode description */
-{
- /* Check the range */
- PRECONDITION (OPC >= (opc_t)0 && OPC < OPC_COUNT);
-
- /* Return the description */
- return &OPCTable [OPC];
-}
-
-
-
unsigned char GetAMUseInfo (am_t AM)
/* Get usage info for the given addressing mode (addressing modes that use
* index registers return REG_r info for these registers).
{
/* Check the addressing mode. */
switch (AM) {
- case AM_ACC: return REG_A;
- case AM_ZPX: return REG_X;
- case AM_ABSX: return REG_X;
- case AM_ABSY: return REG_Y;
- case AM_ZPX_IND: return REG_X;
- case AM_ZP_INDY: return REG_Y;
- default: return REG_NONE;
+ case AM65_ACC: return REG_A;
+ case AM65_ZPX: return REG_X;
+ case AM65_ABSX: return REG_X;
+ case AM65_ABSY: return REG_Y;
+ case AM65_ZPX_IND: return REG_X;
+ case AM65_ZP_INDY: return REG_Y;
+ default: return REG_NONE;
}
}
opc_t GetInverseBranch (opc_t OPC)
-/* Return a brahcn that reverse the condition of the branch given in OPC */
+/* Return a branch that reverse the condition of the branch given in OPC */
{
switch (OPC) {
- case OPC_BCC: return OPC_BCS;
- case OPC_BCS: return OPC_BCC;
- case OPC_BEQ: return OPC_BNE;
- case OPC_BMI: return OPC_BPL;
- case OPC_BNE: return OPC_BEQ;
- case OPC_BPL: return OPC_BMI;
- case OPC_BVC: return OPC_BVS;
- case OPC_BVS: return OPC_BVC;
- case OPC_JCC: return OPC_JCS;
- case OPC_JCS: return OPC_JCC;
- case OPC_JEQ: return OPC_JNE;
- case OPC_JMI: return OPC_JPL;
- case OPC_JNE: return OPC_JEQ;
- case OPC_JPL: return OPC_JMI;
- case OPC_JVC: return OPC_JVS;
- case OPC_JVS: return OPC_JVC;
- default: Internal ("GetInverseBranch: Invalid opcode: %d", OPC);
+ case OP65_BCC: return OP65_BCS;
+ case OP65_BCS: return OP65_BCC;
+ case OP65_BEQ: return OP65_BNE;
+ case OP65_BMI: return OP65_BPL;
+ case OP65_BNE: return OP65_BEQ;
+ case OP65_BPL: return OP65_BMI;
+ case OP65_BVC: return OP65_BVS;
+ case OP65_BVS: return OP65_BVC;
+ case OP65_JCC: return OP65_JCS;
+ case OP65_JCS: return OP65_JCC;
+ case OP65_JEQ: return OP65_JNE;
+ case OP65_JMI: return OP65_JPL;
+ case OP65_JNE: return OP65_JEQ;
+ case OP65_JPL: return OP65_JMI;
+ case OP65_JVC: return OP65_JVS;
+ case OP65_JVS: return OP65_JVC;
+ default:
+ Internal ("GetInverseBranch: Invalid opcode: %d", OPC);
+ return 0;
}
}
+opc_t MakeShortBranch (opc_t OPC)
+/* Return the short version of the given branch. If the branch is already
+ * a short branch, return the opcode unchanged.
+ */
+{
+ switch (OPC) {
+ case OP65_BCC:
+ case OP65_JCC: return OP65_BCC;
+ case OP65_BCS:
+ case OP65_JCS: return OP65_BCS;
+ case OP65_BEQ:
+ case OP65_JEQ: return OP65_BEQ;
+ case OP65_BMI:
+ case OP65_JMI: return OP65_BMI;
+ case OP65_BNE:
+ case OP65_JNE: return OP65_BNE;
+ case OP65_BPL:
+ case OP65_JPL: return OP65_BPL;
+ case OP65_BVC:
+ case OP65_JVC: return OP65_BVC;
+ case OP65_BVS:
+ case OP65_JVS: return OP65_BVS;
+ case OP65_BRA:
+ case OP65_JMP: return (CPUIsets[CPU] & CPU_ISET_65SC02)? OP65_BRA : OP65_JMP;
+ default:
+ Internal ("MakeShortBranch: Invalid opcode: %d", OPC);
+ return 0;
+ }
+}
+
+
+
+opc_t MakeLongBranch (opc_t OPC)
+/* Return the long version of the given branch. If the branch is already
+ * a long branch, return the opcode unchanged.
+ */
+{
+ switch (OPC) {
+ case OP65_BCC:
+ case OP65_JCC: return OP65_JCC;
+ case OP65_BCS:
+ case OP65_JCS: return OP65_JCS;
+ case OP65_BEQ:
+ case OP65_JEQ: return OP65_JEQ;
+ case OP65_BMI:
+ case OP65_JMI: return OP65_JMI;
+ case OP65_BNE:
+ case OP65_JNE: return OP65_JNE;
+ case OP65_BPL:
+ case OP65_JPL: return OP65_JPL;
+ case OP65_BVC:
+ case OP65_JVC: return OP65_JVC;
+ case OP65_BVS:
+ case OP65_JVS: return OP65_JVS;
+ case OP65_BRA:
+ case OP65_JMP: return OP65_JMP;
+ default:
+ Internal ("MakeLongBranch: Invalid opcode: %d", OPC);
+ return 0;
+ }
+}
+
+
+
+bc_t GetBranchCond (opc_t OPC)
+/* Get the condition for the conditional branch in OPC */
+{
+ switch (OPC) {
+ case OP65_BCC: return BC_CC;
+ case OP65_BCS: return BC_CS;
+ case OP65_BEQ: return BC_EQ;
+ case OP65_BMI: return BC_MI;
+ case OP65_BNE: return BC_NE;
+ case OP65_BPL: return BC_PL;
+ case OP65_BVC: return BC_VC;
+ case OP65_BVS: return BC_VS;
+ case OP65_JCC: return BC_CC;
+ case OP65_JCS: return BC_CS;
+ case OP65_JEQ: return BC_EQ;
+ case OP65_JMI: return BC_MI;
+ case OP65_JNE: return BC_NE;
+ case OP65_JPL: return BC_PL;
+ case OP65_JVC: return BC_VC;
+ case OP65_JVS: return BC_VS;
+ default:
+ Internal ("GetBranchCond: Invalid opcode: %d", OPC);
+ return 0;
+ }
+}
+
+
+
+bc_t GetInverseCond (bc_t BC)
+/* Return the inverse condition of the given one */
+{
+ switch (BC) {
+ case BC_CC: return BC_CS;
+ case BC_CS: return BC_CC;
+ case BC_EQ: return BC_NE;
+ case BC_MI: return BC_PL;
+ case BC_NE: return BC_EQ;
+ case BC_PL: return BC_MI;
+ case BC_VC: return BC_VS;
+ case BC_VS: return BC_VC;
+ default:
+ Internal ("GetInverseCond: Invalid condition: %d", BC);
+ return 0;
+ }
+}
+
+
+
+
projects / cc65 / blobdiff