]> git.sur5r.net Git - cc65/blobdiff - src/cc65/opcodes.h
Renamed ExprDesc.Val to ExprDesc.IVal. Added an FVal field for a floating
[cc65] / src / cc65 / opcodes.h
index fcd4aa4444f5365026e678fe3e13924a81de11d6..89a7c4117ee417dd30f05f69c32c716ee8fe9436 100644 (file)
@@ -6,7 +6,7 @@
 /*                                                                           */
 /*                                                                           */
 /*                                                                           */
-/* (C) 2001      Ullrich von Bassewitz                                       */
+/* (C) 2001-2002 Ullrich von Bassewitz                                       */
 /*               Wacholderweg 14                                             */
 /*               D-70597 Stuttgart                                           */
 /* EMail:        uz@cc65.org                                                 */
 
 
 
+/* common */
+#include "inline.h"
+
+
+
 /*****************************************************************************/
-/*                                  Data                                    */
+/*                                  Data                                    */
 /*****************************************************************************/
 
 
 
 /* Definitions for the possible opcodes */
 typedef enum {
-    OPC_ADC,
-    OPC_AND,
-    OPC_ASL,
-    OPC_BCC,
-    OPC_BCS,
-    OPC_BEQ,
-    OPC_BIT,
-    OPC_BMI,
-    OPC_BNE,
-    OPC_BPL,
-    OPC_BRA,
-    OPC_BRK,
-    OPC_BVC,
-    OPC_BVS,
-    OPC_CLC,
-    OPC_CLD,
-    OPC_CLI,
-    OPC_CLV,
-    OPC_CMP,
-    OPC_CPX,
-    OPC_CPY,
-    OPC_DEA,
-    OPC_DEC,
-    OPC_DEX,
-    OPC_DEY,
-    OPC_EOR,
-    OPC_INA,
-    OPC_INC,
-    OPC_INX,
-    OPC_INY,
-    OPC_JCC,
-    OPC_JCS,
-    OPC_JEQ,
-    OPC_JMI,
-    OPC_JMP,
-    OPC_JNE,
-    OPC_JPL,
-    OPC_JSR,
-    OPC_JVC,
-    OPC_JVS,
-    OPC_LDA,
-    OPC_LDX,
-    OPC_LDY,
-    OPC_LSR,
-    OPC_NOP,
-    OPC_ORA,
-    OPC_PHA,
-    OPC_PHP,
-    OPC_PHX,
-    OPC_PHY,
-    OPC_PLA,
-    OPC_PLP,
-    OPC_PLX,
-    OPC_PLY,
-    OPC_ROL,
-    OPC_ROR,
-    OPC_RTI,
-    OPC_RTS,
-    OPC_SBC,
-    OPC_SEC,
-    OPC_SED,
-    OPC_SEI,
-    OPC_STA,
-    OPC_STX,
-    OPC_STY,
-    OPC_TAX,
-    OPC_TAY,
-    OPC_TRB,
-    OPC_TSB,
-    OPC_TSX,
-    OPC_TXA,
-    OPC_TXS,
-    OPC_TYA,
-    OPC_COUNT                                  /* Number of opcodes available */
+
+    /* 65XX opcodes */
+    OP65_ADC,
+    OP65_AND,
+    OP65_ASL,
+    OP65_BCC,
+    OP65_BCS,
+    OP65_BEQ,
+    OP65_BIT,
+    OP65_BMI,
+    OP65_BNE,
+    OP65_BPL,
+    OP65_BRA,
+    OP65_BRK,
+    OP65_BVC,
+    OP65_BVS,
+    OP65_CLC,
+    OP65_CLD,
+    OP65_CLI,
+    OP65_CLV,
+    OP65_CMP,
+    OP65_CPX,
+    OP65_CPY,
+    OP65_DEA,
+    OP65_DEC,
+    OP65_DEX,
+    OP65_DEY,
+    OP65_EOR,
+    OP65_INA,
+    OP65_INC,
+    OP65_INX,
+    OP65_INY,
+    OP65_JCC,
+    OP65_JCS,
+    OP65_JEQ,
+    OP65_JMI,
+    OP65_JMP,
+    OP65_JNE,
+    OP65_JPL,
+    OP65_JSR,
+    OP65_JVC,
+    OP65_JVS,
+    OP65_LDA,
+    OP65_LDX,
+    OP65_LDY,
+    OP65_LSR,
+    OP65_NOP,
+    OP65_ORA,
+    OP65_PHA,
+    OP65_PHP,
+    OP65_PHX,
+    OP65_PHY,
+    OP65_PLA,
+    OP65_PLP,
+    OP65_PLX,
+    OP65_PLY,
+    OP65_ROL,
+    OP65_ROR,
+    OP65_RTI,
+    OP65_RTS,
+    OP65_SBC,
+    OP65_SEC,
+    OP65_SED,
+    OP65_SEI,
+    OP65_STA,
+    OP65_STX,
+    OP65_STY,
+    OP65_STZ,
+    OP65_TAX,
+    OP65_TAY,
+    OP65_TRB,
+    OP65_TSB,
+    OP65_TSX,
+    OP65_TXA,
+    OP65_TXS,
+    OP65_TYA,
+
+    /* Number of opcodes available */
+    OPCODE_COUNT,
+
+    /* Several other opcode information constants */
+    OP65_FIRST = OP65_ADC,
+    OP65_LAST  = OP65_TYA,
+    OP65_COUNT = OP65_LAST - OP65_FIRST + 1
 } opc_t;
 
-/* Addressing modes (bitmapped). */
+/* Addressing modes */
 typedef enum {
-    AM_IMP             = 0x0001,               /* implicit */
-    AM_ACC             = 0x0002,               /* accumulator */
-    AM_IMM             = 0x0004,               /* immidiate */
-    AM_ZP              = 0x0008,               /* zeropage */
-    AM_ZPX             = 0x0010,               /* zeropage,X */
-    AM_ABS             = 0x0020,               /* absolute */
-    AM_ABSX            = 0x0040,               /* absolute,X */
-    AM_ABSY            = 0x0080,               /* absolute,Y */
-    AM_ZPX_IND         = 0x0100,               /* (zeropage,x) */
-    AM_ZP_INDY         = 0x0200,               /* (zeropage),y */
-    AM_ZP_IND          = 0x0400,               /* (zeropage) */
-    AM_BRA             = 0x0800                /* branch */
+
+    /* Addressing modes of the virtual stack machine */
+    AM_IMP,
+    AM_IMM,
+    AM_STACK,
+    AM_ABS,
+
+    /* 65XX addressing modes */
+    AM65_IMP,                  /* implicit */
+    AM65_ACC,                  /* accumulator */
+    AM65_IMM,                  /* immidiate */
+    AM65_ZP,                   /* zeropage */
+    AM65_ZPX,                  /* zeropage,X */
+    AM65_ZPY,                   /* zeropage,Y */
+    AM65_ABS,                  /* absolute */
+    AM65_ABSX,                 /* absolute,X */
+    AM65_ABSY,                 /* absolute,Y */
+    AM65_ZPX_IND,                      /* (zeropage,x) */
+    AM65_ZP_INDY,                      /* (zeropage),y */
+    AM65_ZP_IND,               /* (zeropage) */
+    AM65_BRA                    /* branch */
 } am_t;
 
 /* Branch conditions */
@@ -146,39 +170,52 @@ typedef enum {
     BC_MI,
     BC_NE,
     BC_PL,
-    BC_SR,
     BC_VC,
     BC_VS
 } bc_t;
 
 /* Opcode info */
-#define OF_NONE        0x0000U                 /* No additional information */
-#define OF_UBRA        0x0001U                 /* Unconditional branch */
-#define OF_CBRA        0x0002U                 /* Conditional branch */
-#define OF_RET         0x0004U                 /* Return from function */
-#define OF_LOAD 0x0008U                        /* Register load */
-#define OF_BRA         (OF_UBRA|OF_CBRA)       /* Operation is a jump/branch */
-#define OF_DEAD        (OF_UBRA|OF_RET)        /* Dead end - no exec behind this point */
+#define OF_NONE                0x0000U /* No additional information */
+#define OF_UBRA                0x0001U /* Unconditional branch */
+#define OF_CBRA                0x0002U /* Conditional branch */
+#define OF_ZBRA         0x0004U        /* Branch on zero flag condition */
+#define OF_FBRA         0x0008U /* Branch on cond set by a load */
+#define OF_LBRA         0x0010U        /* Jump/branch is long */
+#define OF_RET                 0x0020U /* Return from function */
+#define OF_LOAD         0x0040U        /* Register load */
+#define OF_STORE        0x0080U /* Register store */
+#define OF_XFR          0x0100U /* Transfer instruction */
+#define OF_CALL         0x0200U /* A subroutine call */
+#define OF_REG_INCDEC   0x0400U /* A register increment or decrement */
+#define OF_SETF         0x0800U /* Insn will set all load flags (not carry) */
+#define OF_CMP          0x1000U /* A compare A/X/Y instruction */
+
+/* Combined infos */
+#define OF_BRA         (OF_UBRA | OF_CBRA)     /* Operation is a jump/branch */
+#define OF_DEAD        (OF_UBRA | OF_RET)      /* Dead end - no exec behind this point */
 
 /* Opcode description */
 typedef struct {
     opc_t                  OPC;                /* Opcode */
-    char                   Mnemo[4];           /* Mnemonic */
+    char                   Mnemo[9];           /* Mnemonic */
     unsigned char   Size;                      /* Size, 0 = check addressing mode */
-    unsigned char   Use;                       /* Registers used by this insn */
-    unsigned char   Chg;                       /* Registers changed by this insn */
-    unsigned char   Info;                      /* Additional information */
+    unsigned short  Use;                       /* Registers used by this insn */
+    unsigned short  Chg;                       /* Registers changed by this insn */
+    unsigned short  Info;                      /* Additional information */
 } OPCDesc;
 
+/* Opcode description table */
+extern const OPCDesc OPCTable[OPCODE_COUNT];
+
 
 
 /*****************************************************************************/
-/*                                          Code                                    */
+/*                                          Code                                    */
 /*****************************************************************************/
 
 
 
-const OPCDesc* FindOpcode (const char* OPC);
+const OPCDesc* FindOP65 (const char* OPC);
 /* Find the given opcode and return the opcode description. If the opcode was
  * not found, NULL is returned.
  */
@@ -186,11 +223,27 @@ const OPCDesc* FindOpcode (const char* OPC);
 unsigned GetInsnSize (opc_t OPC, am_t AM);
 /* Return the size of the given instruction */
 
-const OPCDesc* GetOPCDesc (opc_t OPC);
+#if defined(HAVE_INLINE)
+INLINE const OPCDesc* GetOPCDesc (opc_t OPC)
 /* Get an opcode description */
+{
+    /* Return the description */
+    return &OPCTable [OPC];
+}
+#else
+#  define GetOPCDesc(OPC)      (&OPCTable [(OPC)])
+#endif
 
-unsigned char GetOPCInfo (opc_t OPC);
+#if defined(HAVE_INLINE)
+INLINE unsigned GetOPCInfo (opc_t OPC)
 /* Get opcode information */
+{
+    /* Return the info */
+    return OPCTable[OPC].Info;
+}
+#else
+#  define GetOPCInfo(OPC)      (OPCTable[(OPC)].Info)
+#endif
 
 unsigned char GetAMUseInfo (am_t AM);
 /* Get usage info for the given addressing mode (addressing modes that use
@@ -216,12 +269,6 @@ bc_t GetBranchCond (opc_t OPC);
 bc_t GetInverseCond (bc_t BC);
 /* Return the inverse condition of the given one */
 
-opc_t GetLongBranch (bc_t BC);
-/* Return a long branch for the given branch condition */
-
-opc_t GetShortBranch (bc_t BC);
-/* Return a short branch for the given branch condition */
-
 
 
 /* End of opcodes.h */