Fixed a bug

[cc65] / src / cc65 / opcodes.h

diff --git a/src/cc65/opcodes.h b/src/cc65/opcodes.h
index c81c978f510347f1ccde9e9b1f1b59ac1539c54f..89a7c4117ee417dd30f05f69c32c716ee8fe9436 100644 (file)
--- a/src/cc65/opcodes.h
+++ b/src/cc65/opcodes.h
@@ -6,7 +6,7 @@
 /*                                                                           */
 /*                                                                           */
 /*                                                                           */
-/* (C) 2001      Ullrich von Bassewitz                                       */
+/* (C) 2001-2002 Ullrich von Bassewitz                                       */
 /*               Wacholderweg 14                                             */
 /*               D-70597 Stuttgart                                           */
 /* EMail:        uz@cc65.org                                                 */
@@ -52,24 +52,6 @@
 /* Definitions for the possible opcodes */
 typedef enum {
 
-    /* Opcodes for the virtual stack machine */
-    OPC_CALL,
-    OPC_ENTER,
-    OPC_JMP,
-    OPC_LDA,
-    OPC_LDAX,
-    OPC_LDEAX,
-    OPC_LEA,
-    OPC_LEAVE,
-    OPC_PHA,
-    OPC_PHAX,
-    OPC_PHEAX,
-    OPC_RET,
-    OPC_SPACE,
-    OPC_STA,
-    OPC_STAX,
-    OPC_STEAX,
-
     /* 65XX opcodes */
     OP65_ADC,
     OP65_AND,
@@ -136,6 +118,7 @@ typedef enum {
     OP65_STA,
     OP65_STX,
     OP65_STY,
+    OP65_STZ,
     OP65_TAX,
     OP65_TAY,
     OP65_TRB,
@@ -169,6 +152,7 @@ typedef enum {
     AM65_IMM,                  /* immidiate */
     AM65_ZP,                   /* zeropage */
     AM65_ZPX,                  /* zeropage,X */
+    AM65_ZPY,                   /* zeropage,Y */
     AM65_ABS,                  /* absolute */
     AM65_ABSX,                 /* absolute,X */
     AM65_ABSY,                 /* absolute,Y */
@@ -192,18 +176,19 @@ typedef enum {
 
 /* Opcode info */
 #define OF_NONE                0x0000U /* No additional information */
-#define OF_CPU_6502     0x0000U        /* 6502 opcode */
-#define OF_CPU_VM       0x0001U /* Virtual machine opcode */
-#define OF_MASK_CPU     0x0001U /* Mask for the cpu field */
-#define OF_UBRA                0x0010U /* Unconditional branch */
-#define OF_CBRA                0x0020U /* Conditional branch */
-#define OF_ZBRA         0x0040U        /* Branch on zero flag condition */
-#define OF_FBRA         0x0080U /* Branch on cond set by a load */
-#define OF_LBRA         0x0100U        /* Jump/branch is long */
-#define OF_RET                 0x0200U /* Return from function */
-#define OF_LOAD         0x0400U        /* Register load */
-#define OF_XFR          0x0800U /* Transfer instruction */
-#define OF_CALL         0x1000U /* A subroutine call */
+#define OF_UBRA                0x0001U /* Unconditional branch */
+#define OF_CBRA                0x0002U /* Conditional branch */
+#define OF_ZBRA         0x0004U        /* Branch on zero flag condition */
+#define OF_FBRA         0x0008U /* Branch on cond set by a load */
+#define OF_LBRA         0x0010U        /* Jump/branch is long */
+#define OF_RET                 0x0020U /* Return from function */
+#define OF_LOAD         0x0040U        /* Register load */
+#define OF_STORE        0x0080U /* Register store */
+#define OF_XFR          0x0100U /* Transfer instruction */
+#define OF_CALL         0x0200U /* A subroutine call */
+#define OF_REG_INCDEC   0x0400U /* A register increment or decrement */
+#define OF_SETF         0x0800U /* Insn will set all load flags (not carry) */
+#define OF_CMP          0x1000U /* A compare A/X/Y instruction */
 
 /* Combined infos */
 #define OF_BRA         (OF_UBRA | OF_CBRA)     /* Operation is a jump/branch */
@@ -214,8 +199,8 @@ typedef struct {
     opc_t                  OPC;                /* Opcode */
     char                   Mnemo[9];           /* Mnemonic */
     unsigned char   Size;                      /* Size, 0 = check addressing mode */
-    unsigned char   Use;                       /* Registers used by this insn */
-    unsigned char   Chg;                       /* Registers changed by this insn */
+    unsigned short  Use;                       /* Registers used by this insn */
+    unsigned short  Chg;                       /* Registers changed by this insn */
     unsigned short  Info;                      /* Additional information */
 } OPCDesc;