More robust handling of unknown target state for step/continue packet.

[openocd] / src / flash / at91sam7.h

diff --git a/src/flash/at91sam7.h b/src/flash/at91sam7.h
index c65600eb6627e853ff8d8f5723a4ea79b321661b..ecb5670145328e9cdb739ec9c5e6cb48e1fd9e20 100644 (file)
--- a/src/flash/at91sam7.h
+++ b/src/flash/at91sam7.h
@@ -1,6 +1,6 @@
 /***************************************************************************
  *   Copyright (C) 2006 by Magnus Lundin                                   *
- *   lundinªmlu.mine.nu                                                    *
+ *   lundin@mlu.mine.nu                                                    *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
@@ -25,7 +25,6 @@
 
 typedef struct at91sam7_flash_bank_s
 {
-       struct target_s *target;
        u32 working_area;
        u32 working_area_size;
 
@@ -46,20 +45,21 @@ typedef struct at91sam7_flash_bank_s
        u16 pagesize;
        u16 pages_in_lockregion;
        u8 num_erase_regions;
+       u8 num_planes;
        u32 *erase_region_info;
 
-        /* nv memory bits */
+       /* nv memory bits */
        u16 num_lockbits;
-       u16 lockbits;
+       u16 lockbits[4];
        u16 num_nvmbits;
        u16 nvmbits;
        u8  securitybit;
-       u8  flashmode;         /* 0: not init, 1: fmcn for nvbits (1uS), 2: fmcn for flash (1.5uS) */
+       u8  flashmode[4];         /* 0: not init, 1: fmcn for nvbits (1uS), 2: fmcn for flash (1.5uS) */
 
        /* main clock status */
        u8  mck_valid;
        u32 mck_freq;
-       
+
 } at91sam7_flash_bank_t;
 
 /* AT91SAM7 control registers */
@@ -72,9 +72,6 @@ typedef struct at91sam7_flash_bank_s
 #define PMC_MCKR  0xFFFFFC30
 #define PMC_MCKR_CSS  0x03
 #define PMC_MCKR_PRES 0x1c
-#define MC_FMR 0xFFFFFF60
-#define MC_FCR 0xFFFFFF64
-#define MC_FSR 0xFFFFFF68
 
 /* Flash Controller Commands */
 #define  WP   0x01
@@ -86,7 +83,16 @@ typedef struct at91sam7_flash_bank_s
 #define  CGPB 0x0D
 #define  SSB  0x0F
 
+/* MC_FSR bit definitions */
+#define        MC_FSR_FRDY 1
+#define        MC_FSR_EOL 2
+
 /* AT91SAM7 constants */
 #define RC_FREQ  32000
 
+/*  FLASH_TIMING_MODES */
+#define  FMR_TIMING_NONE    0
+#define  FMR_TIMING_NVBITS  1
+#define  FMR_TIMING_FLASH   2
+
 #endif /* AT91SAM7_H */