flash/nor/at91samd: fix chip erase of a secured device

[openocd] / src / flash / nor / at91samd.c

diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c
index 2673b0eecadd858e1065557919106f4b2726f99f..f018e893d5da0366f77af54c97393059f49e6cab 100644 (file)
--- a/src/flash/nor/at91samd.c
+++ b/src/flash/nor/at91samd.c
@@ -36,6 +36,7 @@
 
 #define SAMD_DSU_STATUSA        1               /* DSU status register */
 #define SAMD_DSU_DID           0x18            /* Device ID register */
+#define SAMD_DSU_CTRL_EXT      0x100           /* CTRL register, external access */
 
 #define SAMD_NVMCTRL_CTRLA             0x00    /* NVM control A register */
 #define SAMD_NVMCTRL_CTRLB             0x04    /* NVM control B register */
@@ -859,18 +860,23 @@ COMMAND_HANDLER(samd_handle_info_command)
 COMMAND_HANDLER(samd_handle_chip_erase_command)
 {
        struct target *target = get_current_target(CMD_CTX);
+       int res = ERROR_FAIL;
 
        if (target) {
                /* Enable access to the DSU by disabling the write protect bit */
                target_write_u32(target, SAMD_PAC1, (1<<1));
+               /* intentionally without error checking - not accessible on secured chip */
+
                /* Tell the DSU to perform a full chip erase.  It takes about 240ms to
                 * perform the erase. */
-               target_write_u8(target, SAMD_DSU, (1<<4));
-
-               command_print(CMD_CTX, "chip erased");
+               res = target_write_u8(target, SAMD_DSU + SAMD_DSU_CTRL_EXT, (1<<4));
+               if (res == ERROR_OK)
+                       command_print(CMD_CTX, "chip erase started");
+               else
+                       command_print(CMD_CTX, "write to DSU CTRL failed");
        }
 
-       return ERROR_OK;
+       return res;
 }
 
 COMMAND_HANDLER(samd_handle_set_security_command)