* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
+#include <jtag/jtag.h>
#include "imp.h"
#include <target/algorithm.h>
#include <target/mips32.h>
/* pic32mx configuration register locations */
+#define PIC32MX_DEVCFG0_1_2 0xBFC00BFC
#define PIC32MX_DEVCFG0 0xBFC02FFC
#define PIC32MX_DEVCFG1 0xBFC02FF8
#define PIC32MX_DEVCFG2 0xBFC02FF4
#define NVMKEY1 0xAA996655
#define NVMKEY2 0x556699AA
+#define MX_1_2 1 /* PIC32mx1xx/2xx */
+
struct pic32mx_flash_bank {
- struct working_area *write_algorithm;
int probed;
+ int dev_type; /* Default 0. 1 for Pic32MX1XX/2XX variant */
};
/*
pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank));
bank->driver_priv = pic32mx_info;
- pic32mx_info->write_algorithm = NULL;
pic32mx_info->probed = 0;
+ pic32mx_info->dev_type = 0;
return ERROR_OK;
}
static int pic32mx_protect_check(struct flash_bank *bank)
{
struct target *target = bank->target;
+ struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
+ uint32_t config0_address;
uint32_t devcfg0;
int s;
int num_pages;
return ERROR_TARGET_NOT_HALTED;
}
- target_read_u32(target, PIC32MX_DEVCFG0, &devcfg0);
+ if (pic32mx_info->dev_type == MX_1_2)
+ config0_address = PIC32MX_DEVCFG0_1_2;
+ else
+ config0_address = PIC32MX_DEVCFG0;
+
+ target_read_u32(target, config0_address, &devcfg0);
if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */
num_pages = 0xffff; /* All pages protected */
num_pages = 0; /* All pages unprotected */
else
num_pages = 0xffff; /* All pages protected */
- } else /* pgm flash */
- num_pages = (~devcfg0 >> 12) & 0xff;
+ } else {
+ /* pgm flash */
+ if (pic32mx_info->dev_type == MX_1_2)
+ num_pages = (~devcfg0 >> 10) & 0x3f;
+ else
+ num_pages = (~devcfg0 >> 12) & 0xff;
+ }
for (s = 0; s < bank->num_sectors && s < num_pages; s++)
bank->sectors[s].is_protected = 1;
/* see contib/loaders/flash/pic32mx.s for src */
-static const uint32_t pic32mx_flash_write_code[] = {
+static uint32_t pic32mx_flash_write_code[] = {
/* write: */
0x3C08AA99, /* lui $t0, 0xaa99 */
0x35086655, /* ori $t0, 0x6655 */
0x00000000 /* nop */
};
-static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer,
+static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
uint32_t buffer_size = 16384;
+ struct working_area *write_algorithm;
struct working_area *source;
uint32_t address = bank->base + offset;
struct reg_param reg_params[3];
+ uint32_t row_size;
int retval = ERROR_OK;
struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
/* flash write code */
if (target_alloc_working_area(target, sizeof(pic32mx_flash_write_code),
- &pic32mx_info->write_algorithm) != ERROR_OK) {
+ &write_algorithm) != ERROR_OK) {
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
- retval = target_write_buffer(target, pic32mx_info->write_algorithm->address,
- sizeof(pic32mx_flash_write_code), (uint8_t *)pic32mx_flash_write_code);
+ /* Change values for counters and row size, depending on variant */
+ if (pic32mx_info->dev_type == MX_1_2) {
+ /* 128 byte row */
+ pic32mx_flash_write_code[8] = 0x2CD30020;
+ pic32mx_flash_write_code[14] = 0x24840080;
+ pic32mx_flash_write_code[15] = 0x24A50080;
+ pic32mx_flash_write_code[17] = 0x24C6FFE0;
+ row_size = 128;
+ } else {
+ /* 512 byte row */
+ pic32mx_flash_write_code[8] = 0x2CD30080;
+ pic32mx_flash_write_code[14] = 0x24840200;
+ pic32mx_flash_write_code[15] = 0x24A50200;
+ pic32mx_flash_write_code[17] = 0x24C6FF80;
+ row_size = 512;
+ }
+
+ uint8_t code[sizeof(pic32mx_flash_write_code)];
+ target_buffer_set_u32_array(target, code, ARRAY_SIZE(pic32mx_flash_write_code),
+ pic32mx_flash_write_code);
+ retval = target_write_buffer(target, write_algorithm->address, sizeof(code), code);
if (retval != ERROR_OK)
return retval;
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
buffer_size /= 2;
if (buffer_size <= 256) {
- /* if we already allocated the writing code, but failed to get a
+ /* we already allocated the writing code, but failed to get a
* buffer, free the algorithm */
- if (pic32mx_info->write_algorithm)
- target_free_working_area(target, pic32mx_info->write_algorithm);
+ target_free_working_area(target, write_algorithm);
LOG_WARNING("no large enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
- };
+ }
mips32_info.common_magic = MIPS32_COMMON_MAGIC;
mips32_info.isa_mode = MIPS32_ISA_MIPS32;
init_reg_param(®_params[1], "a1", 32, PARAM_OUT);
init_reg_param(®_params[2], "a2", 32, PARAM_OUT);
+ int row_offset = offset % row_size;
+ uint8_t *new_buffer = NULL;
+ if (row_offset && (count >= (row_size / 4))) {
+ new_buffer = malloc(buffer_size);
+ if (new_buffer == NULL) {
+ LOG_ERROR("Out of memory");
+ return ERROR_FAIL;
+ }
+ memset(new_buffer, 0xff, row_offset);
+ address -= row_offset;
+ } else
+ row_offset = 0;
+
while (count > 0) {
uint32_t status;
- uint32_t thisrun_count = (count > (buffer_size / 4)) ?
- (buffer_size / 4) : count;
+ uint32_t thisrun_count;
- retval = target_write_buffer(target, source->address,
- thisrun_count * 4, buffer);
- if (retval != ERROR_OK)
- break;
+ if (row_offset) {
+ thisrun_count = (count > ((buffer_size - row_offset) / 4)) ?
+ ((buffer_size - row_offset) / 4) : count;
+
+ memcpy(new_buffer + row_offset, buffer, thisrun_count * 4);
+
+ retval = target_write_buffer(target, source->address,
+ row_offset + thisrun_count * 4, new_buffer);
+ if (retval != ERROR_OK)
+ break;
+ } else {
+ thisrun_count = (count > (buffer_size / 4)) ?
+ (buffer_size / 4) : count;
+
+ retval = target_write_buffer(target, source->address,
+ thisrun_count * 4, buffer);
+ if (retval != ERROR_OK)
+ break;
+ }
buf_set_u32(reg_params[0].value, 0, 32, Virt2Phys(source->address));
buf_set_u32(reg_params[1].value, 0, 32, Virt2Phys(address));
- buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
+ buf_set_u32(reg_params[2].value, 0, 32, thisrun_count + row_offset / 4);
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
- pic32mx_info->write_algorithm->address,
+ write_algorithm->address,
0, 10000, &mips32_info);
if (retval != ERROR_OK) {
LOG_ERROR("error executing pic32mx flash write algorithm");
buffer += thisrun_count * 4;
address += thisrun_count * 4;
count -= thisrun_count;
+ if (row_offset) {
+ address += row_offset;
+ row_offset = 0;
+ }
}
target_free_working_area(target, source);
- target_free_working_area(target, pic32mx_info->write_algorithm);
+ target_free_working_area(target, write_algorithm);
destroy_reg_param(®_params[0]);
destroy_reg_param(®_params[1]);
destroy_reg_param(®_params[2]);
+ if (new_buffer != NULL)
+ free(new_buffer);
return retval;
}
return pic32mx_nvm_exec(bank, NVMCON_OP_WORD_PROG, 5);
}
-static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int pic32mx_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
{
uint32_t words_remaining = (count / 4);
uint32_t bytes_remaining = (count & 0x00000003);
return ERROR_FLASH_OPERATION_FAILED;
}
- page_size = 4096;
+ /* Check for PIC32mx1xx/2xx */
+ for (i = 0; pic32mx_devs[i].name != NULL; i++) {
+ if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
+ if ((*(pic32mx_devs[i].name) == '1') || (*(pic32mx_devs[i].name) == '2'))
+ pic32mx_info->dev_type = MX_1_2;
+ break;
+ }
+ }
+
+ if (pic32mx_info->dev_type == MX_1_2)
+ page_size = 1024;
+ else
+ page_size = 4096;
+
if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
/* 0x1FC00000: Boot flash size */
}
#else
/* fixed 12k boot bank - see comments above */
- num_pages = (12 * 1024);
+ if (pic32mx_info->dev_type == MX_1_2)
+ num_pages = (3 * 1024);
+ else
+ num_pages = (12 * 1024);
#endif
} else {
/* read the flash size from the device */
if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) {
- LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
- num_pages = (512 * 1024);
+ if (pic32mx_info->dev_type == MX_1_2) {
+ LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 32k flash");
+ num_pages = (32 * 1024);
+ } else {
+ LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
+ num_pages = (512 * 1024);
+ }
}
}
/* unlock/erase device */
mips_ejtag_drscan_8_out(ejtag_info, MCHP_ASERT_RST);
+ jtag_add_sleep(200);
mips_ejtag_drscan_8_out(ejtag_info, MCHP_ERASE);
.read = default_flash_read,
.probe = pic32mx_probe,
.auto_probe = pic32mx_auto_probe,
- .erase_check = default_flash_mem_blank_check,
+ .erase_check = default_flash_blank_check,
.protect_check = pic32mx_protect_check,
.info = pic32mx_info,
};
projects / openocd / blobdiff