* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include <helper/binarybuffer.h>
#include <target/algorithm.h>
#include <target/armv7m.h>
+#include <target/cortex_m.h>
/* stm32lx flash register locations */
/* other registers */
#define DBGMCU_IDCODE 0xE0042000
#define F_SIZE 0x1FF8004C
+#define F_SIZE_MP 0x1FF800CC /* on 0x427 Medium+ and 0x436 HD devices */
/* Constants */
#define FLASH_PAGE_SIZE 256
struct stm32lx_flash_bank {
int probed;
+ bool has_dual_banks;
+ uint32_t user_bank_size;
};
/* flash bank stm32lx <base> <size> 0 0 <target#>
bank->driver_priv = stm32lx_info;
stm32lx_info->probed = 0;
+ stm32lx_info->has_dual_banks = false;
+ stm32lx_info->user_bank_size = bank->size;
+
+ /* the stm32l erased value is 0x00 */
+ bank->default_padded_value = 0x00;
return ERROR_OK;
}
uint32_t wrpr;
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
/*
* Read the WRPR word, and check each bit (corresponding to each
* flash sector
return ERROR_OK;
}
-static int stm32lx_write_half_pages(struct flash_bank *bank, uint8_t *buffer,
+static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
retval = target_write_buffer(target,
write_algorithm->address,
sizeof(stm32lx_flash_write_code),
- (uint8_t *)stm32lx_flash_write_code);
+ stm32lx_flash_write_code);
if (retval != ERROR_OK) {
target_free_working_area(target, write_algorithm);
return retval;
}
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARMV7M_MODE_ANY;
+ armv7m_info.core_mode = ARM_MODE_THREAD;
init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
return retval;
}
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+ if (armv7m == NULL) {
+
+ /* something is very wrong if armv7m is NULL */
+ LOG_ERROR("unable to get armv7m target");
+ return retval;
+ }
+
+ /* save any DEMCR flags and configure target to catch any Hard Faults */
+ uint32_t demcr_save = armv7m->demcr;
+ armv7m->demcr = VC_HARDERR;
+
/* Loop while there are bytes to write */
while (count > 0) {
uint32_t this_count;
/* 5: Execute the bunch of code */
retval = target_run_algorithm(target, 0, NULL, sizeof(reg_params)
/ sizeof(*reg_params), reg_params,
- write_algorithm->address, 0, 20000, &armv7m_info);
+ write_algorithm->address, 0, 10000, &armv7m_info);
if (retval != ERROR_OK)
break;
+ /* check for Hard Fault */
+ if (armv7m->exception_number == 3)
+ break;
+
/* 6: Wait while busy */
retval = stm32lx_wait_until_bsy_clear(bank);
if (retval != ERROR_OK)
count -= this_count;
}
+ /* restore previous flags */
+ armv7m->demcr = demcr_save;
+
+ if (armv7m->exception_number == 3) {
+
+ /* the stm32l15x devices seem to have an issue when blank.
+ * if a ram loader is executed on a blank device it will
+ * Hard Fault, this issue does not happen for a already programmed device.
+ * A related issue is described in the stm32l151xx errata (Doc ID 17721 Rev 6 - 2.1.3).
+ * The workaround of handling the Hard Fault exception does work, but makes the
+ * loader more complicated, as a compromise we manually write the pages, programming time
+ * is reduced by 50% using this slower method.
+ */
+
+ LOG_WARNING("couldn't use loader, falling back to page memory writes");
+
+ while (count > 0) {
+ uint32_t this_count;
+ this_count = (count > 128) ? 128 : count;
+
+ /* Write the next half pages */
+ retval = target_write_buffer(target, address, this_count, buffer);
+ if (retval != ERROR_OK)
+ break;
+
+ /* Wait while busy */
+ retval = stm32lx_wait_until_bsy_clear(bank);
+ if (retval != ERROR_OK)
+ break;
+
+ buffer += this_count;
+ address += this_count;
+ count -= this_count;
+ }
+ }
+
if (retval == ERROR_OK)
retval = stm32lx_lock_program_memory(bank);
return retval;
}
-static int stm32lx_write(struct flash_bank *bank, uint8_t *buffer,
+static int stm32lx_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
uint16_t flash_size_in_kb;
uint16_t max_flash_size_in_kb;
uint32_t device_id;
+ uint32_t base_address = FLASH_BANK0_ADDRESS;
+ uint32_t second_bank_base;
+ uint32_t first_bank_size_in_kb;
stm32lx_info->probed = 0;
case 0x416:
max_flash_size_in_kb = 128;
break;
+ case 0x427:
+ /* single bank, high density */
+ max_flash_size_in_kb = 256;
+ break;
case 0x436:
+ /* According to ST, the devices with id 0x436 have dual bank flash and comes with
+ * a total flash size of 384k or 256kb. However, the first bank is always 192kb,
+ * and second one holds the rest. The reason is that the 256kb version is actually
+ * the same physical flash but only the first 256kb are verified.
+ */
max_flash_size_in_kb = 384;
+ first_bank_size_in_kb = 192;
+ stm32lx_info->has_dual_banks = true;
+ break;
+ case 0x437:
+ /* Dual bank, high density */
+ max_flash_size_in_kb = 512;
+ first_bank_size_in_kb = 192;
+ stm32lx_info->has_dual_banks = true;
break;
default:
LOG_WARNING("Cannot identify target as a STM32L family.");
return ERROR_FAIL;
}
- /* get flash size from target. */
- retval = target_read_u16(target, F_SIZE, &flash_size_in_kb);
+ /* Get the flash size from target. 0x427 and 0x436 devices use a
+ * different location for the Flash Size register, please see RM0038 r8 or
+ * newer. */
+ if ((device_id & 0xfff) == 0x427 || (device_id & 0xfff) == 0x436 ||
+ (device_id & 0xfff) == 0x437)
+ retval = target_read_u16(target, F_SIZE_MP, &flash_size_in_kb);
+ else
+ retval = target_read_u16(target, F_SIZE, &flash_size_in_kb);
+
+ /* 0x436 devices report their flash size as a 0 or 1 code indicating 384K
+ * or 256K, respectively. Please see RM0038 r8 or newer and refer to
+ * section 30.1.1. */
+ if (retval == ERROR_OK && (device_id & 0xfff) == 0x436) {
+ if (flash_size_in_kb == 0)
+ flash_size_in_kb = 384;
+ else if (flash_size_in_kb == 1)
+ flash_size_in_kb = 256;
+ }
- /* failed reading flash size or flash size invalid (early silicon),
+ /* Failed reading flash size or flash size invalid (early silicon),
* default to max target family */
if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0) {
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash",
+ LOG_WARNING("STM32L flash size failed, probe inaccurate - assuming %dk flash",
max_flash_size_in_kb);
flash_size_in_kb = max_flash_size_in_kb;
+ } else if (flash_size_in_kb > max_flash_size_in_kb) {
+ LOG_WARNING("STM32L probed flash size assumed incorrect since FLASH_SIZE=%dk > %dk, - assuming %dk flash",
+ flash_size_in_kb, max_flash_size_in_kb, max_flash_size_in_kb);
+ flash_size_in_kb = max_flash_size_in_kb;
+ }
+
+ if (stm32lx_info->has_dual_banks) {
+ /* Use the configured base address to determine if this is the first or second flash bank.
+ * Verify that the base address is reasonably correct and determine the flash bank size
+ */
+ second_bank_base = base_address + first_bank_size_in_kb * 1024;
+ if (bank->base == second_bank_base) {
+ /* This is the second bank */
+ base_address = second_bank_base;
+ flash_size_in_kb = flash_size_in_kb - first_bank_size_in_kb;
+ } else if (bank->base == 0 || bank->base == base_address) {
+ /* This is the first bank */
+ flash_size_in_kb = first_bank_size_in_kb;
+ } else {
+ LOG_WARNING("STM32L flash bank base address config is incorrect."
+ " 0x%" PRIx32 " but should rather be 0x%" PRIx32 " or 0x%" PRIx32,
+ bank->base, base_address, second_bank_base);
+ return ERROR_FAIL;
+ }
+ LOG_INFO("STM32L flash has dual banks. Bank (%d) size is %dkb, base address is 0x%" PRIx32,
+ bank->bank_number, flash_size_in_kb, base_address);
+ } else {
+ LOG_INFO("STM32L flash size is %dkb, base address is 0x%" PRIx32, flash_size_in_kb, base_address);
+ }
+
+ /* if the user sets the size manually then ignore the probed value
+ * this allows us to work around devices that have a invalid flash size register value */
+ if (stm32lx_info->user_bank_size) {
+ flash_size_in_kb = stm32lx_info->user_bank_size / 1024;
+ LOG_INFO("ignoring flash probed value, using configured bank size: %dkbytes", flash_size_in_kb);
}
/* STM32L - we have 32 sectors, 16 pages per sector -> 512 pages
/* calculate numbers of sectors (4kB per sector) */
int num_sectors = (flash_size_in_kb * 1024) / FLASH_SECTOR_SIZE;
- LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
if (bank->sectors) {
free(bank->sectors);
bank->sectors = NULL;
}
- bank->base = FLASH_BANK0_ADDRESS;
bank->size = flash_size_in_kb * 1024;
+ bank->base = base_address;
bank->num_sectors = num_sectors;
bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
if (bank->sectors == NULL) {
{
/* This method must return a string displaying information about the bank */
- struct target *target = bank->target;
- uint32_t device_id;
- int printed;
+ uint32_t dbgmcu_idcode;
/* read stm32 device id register */
- int retval = target_read_u32(target, DBGMCU_IDCODE, &device_id);
+ int retval = target_read_u32(bank->target, DBGMCU_IDCODE, &dbgmcu_idcode);
if (retval != ERROR_OK)
return retval;
- if ((device_id & 0xfff) == 0x416) {
- printed = snprintf(buf, buf_size, "stm32lx - Rev: ");
- buf += printed;
- buf_size -= printed;
+ uint16_t device_id = dbgmcu_idcode & 0xfff;
+ uint16_t rev_id = dbgmcu_idcode >> 16;
+ const char *device_str;
+ const char *rev_str = NULL;
- switch (device_id >> 16) {
- case 0x1000:
- snprintf(buf, buf_size, "A");
- break;
+ switch (device_id) {
+ case 0x416:
+ device_str = "STM32L1xx (Low/Medium Density)";
- case 0x1008:
- snprintf(buf, buf_size, "Y");
- break;
+ switch (rev_id) {
+ case 0x1000:
+ rev_str = "A";
+ break;
- case 0x1018:
- snprintf(buf, buf_size, "X");
- break;
+ case 0x1008:
+ rev_str = "Y";
+ break;
- case 0x1038:
- snprintf(buf, buf_size, "W");
- break;
+ case 0x1018:
+ rev_str = "X";
+ break;
- case 0x1078:
- snprintf(buf, buf_size, "V");
- break;
+ case 0x1038:
+ rev_str = "W";
+ break;
- default:
- snprintf(buf, buf_size, "unknown");
- break;
+ case 0x1078:
+ rev_str = "V";
+ break;
}
- } else if ((device_id & 0xfff) == 0x436) {
- printed = snprintf(buf, buf_size, "stm32lx (HD) - Rev: ");
- buf += printed;
- buf_size -= printed;
-
- switch (device_id >> 16) {
- case 0x1000:
- snprintf(buf, buf_size, "A");
- break;
+ break;
- case 0x1008:
- snprintf(buf, buf_size, "Z");
- break;
+ case 0x427:
+ device_str = "STM32L1xx (Medium+ Density)";
- case 0x1018:
- snprintf(buf, buf_size, "Y");
- break;
+ switch (rev_id) {
+ case 0x1018:
+ rev_str = "A";
+ break;
+ }
+ break;
- default:
- snprintf(buf, buf_size, "unknown");
- break;
+ case 0x436:
+ device_str = "STM32L1xx (Medium+/High Density)";
+
+ switch (rev_id) {
+ case 0x1000:
+ rev_str = "A";
+ break;
+
+ case 0x1008:
+ rev_str = "Z";
+ break;
+
+ case 0x1018:
+ rev_str = "Y";
+ break;
}
- } else {
- snprintf(buf, buf_size, "Cannot identify target as a stm32lx");
+ break;
+
+ case 0x437:
+ device_str = "STM32L1xx (Medium+/High Density)";
+ break;
+
+ default:
+ snprintf(buf, buf_size, "Cannot identify target as a STM32L1");
return ERROR_FAIL;
}
+ if (rev_str != NULL)
+ snprintf(buf, buf_size, "%s - Rev: %s", device_str, rev_str);
+ else
+ snprintf(buf, buf_size, "%s - Rev: unknown (0x%04x)", device_str, rev_id);
+
return ERROR_OK;
}