]> git.sur5r.net Git - openocd/blobdiff - src/flash/s3c2410_nand.c
stm32x_options_t -> struct stm32x_options
[openocd] / src / flash / s3c2410_nand.c
index fabcfbd54ba1a096103285cebb079c0edd78e3e0..4d084403bf3d4606139fffc332ee49a15135bb90 100644 (file)
 #include "config.h"
 #endif
 
-#include "replacements.h"
-#include "log.h"
-
-#include <stdlib.h>
-#include <string.h>
-
-#include "nand.h"
 #include "s3c24xx_nand.h"
-#include "target.h"
-
-int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
-int s3c2410_init(struct nand_device_s *device);
-int s3c2410_read_data(struct nand_device_s *device, void *data);
-int s3c2410_write_data(struct nand_device_s *device, u16 data);
-int s3c2410_nand_ready(struct nand_device_s *device, int timeout);
 
-nand_flash_controller_t s3c2410_nand_controller =
+NAND_DEVICE_COMMAND_HANDLER(s3c2410_nand_device_command)
 {
-       .name                   = "s3c2410",
-       .nand_device_command    = s3c2410_nand_device_command,
-       .register_commands      = s3c24xx_register_commands,
-       .init                   = s3c2410_init,
-       .reset                  = s3c24xx_reset,
-       .command                = s3c24xx_command,
-       .address                = s3c24xx_address,
-       .write_data             = s3c2410_write_data,
-       .read_data              = s3c2410_read_data,
-       .write_page             = s3c24xx_write_page,
-       .read_page              = s3c24xx_read_page,
-       .controller_ready       = s3c24xx_controller_ready,
-       .nand_ready             = s3c2410_nand_ready,
-};
-
-int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
-                               char **args, int argc,
-                               struct nand_device_s *device)
-{
-       s3c24xx_nand_controller_t *info;
-       
-       info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
-       if (info == NULL) {
-               return ERROR_NAND_DEVICE_INVALID;
-       }
+       struct s3c24xx_nand_controller *info;
+       CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
 
        /* fill in the address fields for the core device */
        info->cmd = S3C2410_NFCMD;
        info->addr = S3C2410_NFADDR;
        info->data = S3C2410_NFDATA;
        info->nfstat = S3C2410_NFSTAT;
-               
+
        return ERROR_OK;
 }
 
-int s3c2410_init(struct nand_device_s *device)
+static int s3c2410_init(struct nand_device_s *nand)
 {
-       s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+       struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
        target_t *target = s3c24xx_info->target;
 
-       target_write_u32(target, S3C2410_NFCONF, 
+       target_write_u32(target, S3C2410_NFCONF,
                         S3C2410_NFCONF_EN | S3C2410_NFCONF_TACLS(3) |
                         S3C2410_NFCONF_TWRPH0(5) | S3C2410_NFCONF_TWRPH1(3));
 
        return ERROR_OK;
 }
 
-int s3c2410_write_data(struct nand_device_s *device, u16 data)
+static int s3c2410_write_data(struct nand_device_s *nand, uint16_t data)
 {
-       s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+       struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
        target_t *target = s3c24xx_info->target;
 
        if (target->state != TARGET_HALTED) {
                LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
                return ERROR_NAND_OPERATION_FAILED;
        }
-       
+
        target_write_u32(target, S3C2410_NFDATA, data);
        return ERROR_OK;
 }
 
-int s3c2410_read_data(struct nand_device_s *device, void *data)
+static int s3c2410_read_data(struct nand_device_s *nand, void *data)
 {
-       s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+       struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
        target_t *target = s3c24xx_info->target;
-       
+
        if (target->state != TARGET_HALTED) {
                LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
                return ERROR_NAND_OPERATION_FAILED;
        }
 
-       target_read_u8(target, S3C2410_NFDATA, data);   
+       target_read_u8(target, S3C2410_NFDATA, data);
        return ERROR_OK;
 }
 
-int s3c2410_nand_ready(struct nand_device_s *device, int timeout)
+static int s3c2410_nand_ready(struct nand_device_s *nand, int timeout)
 {
-       s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+       struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
        target_t *target = s3c24xx_info->target;
-       u8 status;
+       uint8_t status;
 
        if (target->state != TARGET_HALTED) {
                LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
                return ERROR_NAND_OPERATION_FAILED;
        }
-       
+
        do {
                target_read_u8(target, S3C2410_NFSTAT, &status);
-               
+
                if (status & S3C2410_NFSTAT_BUSY)
                        return 1;
 
-               alive_sleep(1);         
+               alive_sleep(1);
        } while (timeout-- > 0);
 
        return 0;
 }
+
+struct nand_flash_controller s3c2410_nand_controller = {
+               .name = "s3c2410",
+               .nand_device_command = &s3c2410_nand_device_command,
+               .register_commands = &s3c24xx_register_commands,
+               .init = &s3c2410_init,
+               .reset = &s3c24xx_reset,
+               .command = &s3c24xx_command,
+               .address = &s3c24xx_address,
+               .write_data = &s3c2410_write_data,
+               .read_data = &s3c2410_read_data,
+               .write_page = s3c24xx_write_page,
+               .read_page = s3c24xx_read_page,
+               .controller_ready = &s3c24xx_controller_ready,
+               .nand_ready = &s3c2410_nand_ready,
+       };