/* main clock status */
uint32_t rcc;
+ uint32_t rcc2;
uint8_t mck_valid;
+ uint8_t xtal_mask;
+ uint32_t iosc_freq;
uint32_t mck_freq;
+ const char *iosc_desc;
+ const char *mck_desc;
} stellaris_flash_bank_t;
/* STELLARIS control registers */
#define RIS 0x050
#define RCC 0x060
#define PLLCFG 0x064
+#define RCC2 0x070
#define FMPRE 0x130
#define FMPPE 0x134
#define USECRL 0x140
#define FLASH_CONTROL_BASE 0x400FD000
-#define FLASH_FMA (FLASH_CONTROL_BASE|0x000)
-#define FLASH_FMD (FLASH_CONTROL_BASE|0x004)
-#define FLASH_FMC (FLASH_CONTROL_BASE|0x008)
-#define FLASH_CRIS (FLASH_CONTROL_BASE|0x00C)
-#define FLASH_CIM (FLASH_CONTROL_BASE|0x010)
-#define FLASH_MISC (FLASH_CONTROL_BASE|0x014)
+#define FLASH_FMA (FLASH_CONTROL_BASE | 0x000)
+#define FLASH_FMD (FLASH_CONTROL_BASE | 0x004)
+#define FLASH_FMC (FLASH_CONTROL_BASE | 0x008)
+#define FLASH_CRIS (FLASH_CONTROL_BASE | 0x00C)
+#define FLASH_CIM (FLASH_CONTROL_BASE | 0x010)
+#define FLASH_MISC (FLASH_CONTROL_BASE | 0x014)
#define AMISC 1
#define PMISC 2