rtos: style corrections for uCOS-III

[openocd] / src / rtos / rtos_ucos_iii_stackings.c

diff --git a/src/rtos/rtos_ucos_iii_stackings.c b/src/rtos/rtos_ucos_iii_stackings.c
index f2f5564fd27930bb45c0fa3f68a7d92a45fbcb22..c260b7f80cfb67e7791e70ac2683cf3691061ada 100644 (file)
--- a/src/rtos/rtos_ucos_iii_stackings.c
+++ b/src/rtos/rtos_ucos_iii_stackings.c
@@ -1,5 +1,5 @@
 /***************************************************************************
- *   Copyright (C) 2016 by Square, Inc.                                    *
+ *   Copyright (C) 2017 by Square, Inc.                                    *
  *   Steven Stallion <stallion@squareup.com>                               *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
@@ -20,34 +20,35 @@
 #include "config.h"
 #endif
 
-#include "rtos.h"
-#include "rtos_standard_stackings.h"
-#include "target/armv7m.h"
+#include <helper/types.h>
+#include <rtos/rtos.h>
+#include <rtos/rtos_standard_stackings.h>
+#include <target/armv7m.h>
 
-static const struct stack_register_offset rtos_uCOS_III_Cortex_M_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
-       { 0x20, 32 },           /* r0   */
-       { 0x24, 32 },           /* r1   */
-       { 0x28, 32 },           /* r2   */
-       { 0x2c, 32 },           /* r3   */
-       { 0x00, 32 },           /* r4   */
-       { 0x04, 32 },           /* r5   */
-       { 0x08, 32 },           /* r6   */
-       { 0x0c, 32 },           /* r7   */
-       { 0x10, 32 },           /* r8   */
-       { 0x14, 32 },           /* r9   */
-       { 0x18, 32 },           /* r10  */
-       { 0x1c, 32 },           /* r11  */
-       { 0x30, 32 },           /* r12  */
-       { -2,   32 },           /* sp   */
-       { 0x34, 32 },           /* lr   */
-       { 0x38, 32 },           /* pc   */
-       { 0x3c, 32 },           /* xPSR */
+static const struct stack_register_offset rtos_uCOS_III_Cortex_M_stack_offsets[] = {
+       { 0x20, 32 },   /* r0   */
+       { 0x24, 32 },   /* r1   */
+       { 0x28, 32 },   /* r2   */
+       { 0x2c, 32 },   /* r3   */
+       { 0x00, 32 },   /* r4   */
+       { 0x04, 32 },   /* r5   */
+       { 0x08, 32 },   /* r6   */
+       { 0x0c, 32 },   /* r7   */
+       { 0x10, 32 },   /* r8   */
+       { 0x14, 32 },   /* r9   */
+       { 0x18, 32 },   /* r10  */
+       { 0x1c, 32 },   /* r11  */
+       { 0x30, 32 },   /* r12  */
+       { -2,   32 },   /* sp   */
+       { 0x34, 32 },   /* lr   */
+       { 0x38, 32 },   /* pc   */
+       { 0x3c, 32 },   /* xPSR */
 };
 
 const struct rtos_register_stacking rtos_uCOS_III_Cortex_M_stacking = {
-       0x40,                                   /* stack_registers_size */
-       -1,                                     /* stack_growth_direction */
-       ARMV7M_NUM_CORE_REGS,                   /* num_output_registers */
-       rtos_generic_stack_align8,              /* stack_alignment */
-       rtos_uCOS_III_Cortex_M_stack_offsets    /* register_offsets */
+       0x40,                                                                                           /* stack_registers_size */
+       -1,                                                                                                     /* stack_growth_direction */
+       ARRAY_SIZE(rtos_uCOS_III_Cortex_M_stack_offsets),       /* num_output_registers */
+       rtos_generic_stack_align8,                                                      /* stack_alignment */
+       rtos_uCOS_III_Cortex_M_stack_offsets                            /* register_offsets */
 };