endif
AM_CPPFLAGS = \
- -I$(top_srcdir)/src/helper \
- -I$(top_srcdir)/src/jtag \
- -I$(top_srcdir)/src/xsvf
+ -I$(top_srcdir)/src \
+ -I$(top_builddir)/src
BIN2C = $(top_builddir)/src/helper/bin2char$(EXEEXT_FOR_BUILD)
$(ARMV7_SRC) \
$(ARM_MISC_SRC) \
$(MIPS32_SRC) \
- avrt.c
+ avrt.c \
+ dsp563xx.c \
+ dsp563xx_once.c
TARGET_CORE_SRC = \
algorithm.c \
image.c \
breakpoints.c \
target.c \
- target_request.c
+ target_request.c \
+ testee.c
ARMV4_5_SRC = \
armv4_5.c \
arm9tdmi.c \
arm920t.c \
arm966e.c \
- arm926ejs.c
+ arm926ejs.c \
+ feroceon.c
ARM_MISC_SRC = \
fa526.c \
- feroceon.c \
xscale.c
ARMV6_SRC = \
arm_jtag.c \
arm_disassembler.c \
arm_simulator.c \
+ arm_semihosting.c \
arm_adi_v5.c \
+ adi_v5_jtag.c \
+ adi_v5_swd.c \
embeddedice.c \
trace.c \
etb.c \
noinst_HEADERS = \
algorithm.h \
+ arm.h \
arm_dpm.h \
arm_jtag.h \
arm_adi_v5.h \
arm_disassembler.h \
+ arm_opcodes.h \
arm_simulator.h \
+ arm_semihosting.h \
arm7_9_common.h \
arm7tdmi.h \
arm720t.h \
arm926ejs.h \
arm966e.h \
arm11.h \
+ arm11_dbgtap.h \
armv4_5.h \
armv4_5_mmu.h \
armv4_5_cache.h \
armv7a.h \
armv7m.h \
avrt.h \
+ dsp563xx.h \
+ dsp563xx_once.h \
breakpoints.h \
cortex_m3.h \
cortex_a8.h \