cortex_m3: use register_commands()

[openocd] / src / target / arm11.h

diff --git a/src/target/arm11.h b/src/target/arm11.h
index a67c33710b7d297853bd390f6aaf6c82f8d5aa72..c3f4e8643bfa6fc6aab38551f869734cd6b484d0 100644 (file)
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -26,8 +26,7 @@
 #include "armv4_5.h"
 #include "arm_dpm.h"
 
-/* TEMPORARY -- till we switch to the shared infrastructure */
-#define ARM11_REGCACHE_COUNT           20
+#define ARM11_REGCACHE_COUNT           3
 
 #define ARM11_TAP_DEFAULT                      TAP_INVALID
 
@@ -41,12 +40,6 @@
                }                               \
        } while (0)
 
-struct arm11_register_history
-{
-       uint32_t                value;
-       uint8_t         valid;
-};
-
 enum arm11_debug_version
 {
        ARM11_DEBUG_V6                  = 0x01,
@@ -76,7 +69,7 @@ struct arm11_common
 
        bool    simulate_reset_on_next_halt;    /**< Perform cleanups of the ARM state on next halt */
 
-       /** \name Shadow registers to save processor state */
+       /** \name Shadow registers to save debug state */
        /*@{*/
 
        struct reg *    reg_list;                                                       /**< target register list */
@@ -84,9 +77,6 @@ struct arm11_common
 
        /*@}*/
 
-       struct arm11_register_history
-               reg_history[ARM11_REGCACHE_COUNT];      /**< register state before last resume */
-
        size_t  free_brps;                              /**< keep track of breakpoints allocated by arm11_add_breakpoint() */
        size_t  free_wrps;                              /**< keep track of breakpoints allocated by arm11_add_watchpoint() */