]> git.sur5r.net Git - openocd/blobdiff - src/target/arm11_dbgtap.c
cortex a8: add missing error handling
[openocd] / src / target / arm11_dbgtap.c
index f0490596edcc5db54e7f24a059c0525806c014d4..9ecd08f78c3932e974e1ed2f1f8c7342566754b5 100644 (file)
@@ -49,13 +49,13 @@ static const tap_state_t arm11_move_pi_to_si_via_ci[] =
 
 
 /* REVISIT no error handling here! */
-static void arm11_add_ir_scan_vc(struct jtag_tap *tap, int num_fields, struct scan_field *fields,
+static void arm11_add_ir_scan_vc(struct jtag_tap *tap, struct scan_field *fields,
                tap_state_t state)
 {
        if (cmd_queue_cur_state == TAP_IRPAUSE)
                jtag_add_pathmove(ARRAY_SIZE(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
 
-       jtag_add_ir_scan(tap, num_fields, fields, state);
+       jtag_add_ir_scan(tap, fields, state);
 }
 
 static const tap_state_t arm11_move_pd_to_sd_via_cd[] =
@@ -149,7 +149,7 @@ void arm11_add_IR(struct arm11_common * arm11, uint8_t instr, tap_state_t state)
 
        arm11_setup_field(arm11, 5, &instr, NULL, &field);
 
-       arm11_add_ir_scan_vc(arm11->arm.target->tap, 1, &field, state == ARM11_TAP_DEFAULT ? TAP_IRPAUSE : state);
+       arm11_add_ir_scan_vc(arm11->arm.target->tap, &field, state == ARM11_TAP_DEFAULT ? TAP_IRPAUSE : state);
 }
 
 /** Verify data shifted out from Scan Chain Register (SCREG). */
@@ -482,7 +482,7 @@ int arm11_run_instr_data_to_core(struct arm11_common * arm11, uint32_t opcode, u
                {
                        Data        = *data;
 
-                       arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain5_fields), chain5_fields, jtag_set_end_state(TAP_IDLE));
+                       arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain5_fields), chain5_fields, TAP_IDLE);
 
                        CHECK_RETVAL(jtag_execute_queue());
 
@@ -898,7 +898,7 @@ int arm11_sc7_run(struct arm11_common * arm11, struct arm11_sc7_action * actions
                }
 
                /* Timeout here so we don't get stuck. */
-               int i = 0;
+               int i_n = 0;
                while (1)
                {
                        JTAG_DEBUG("SC7 <= c%-3d Data %08x %s",
@@ -917,11 +917,11 @@ int arm11_sc7_run(struct arm11_common * arm11, struct arm11_sc7_action * actions
 
                        long long then = 0;
 
-                       if (i == 1000)
+                       if (i_n == 1000)
                        {
                                then = timeval_ms();
                        }
-                       if (i >= 1000)
+                       if (i_n >= 1000)
                        {
                                if ((timeval_ms()-then) > 1000)
                                {
@@ -930,7 +930,7 @@ int arm11_sc7_run(struct arm11_common * arm11, struct arm11_sc7_action * actions
                                }
                        }
 
-                       i++;
+                       i_n++;
                }
 
                if (!nRW)
@@ -1086,7 +1086,7 @@ static int arm11_dpm_instr_read_data_r0(struct arm_dpm *dpm,
  * and watchpoint operations instead of running them right away.  Since we
  * pre-allocated our vector, we don't need to worry about space.
  */
-static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index,
+static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
                uint32_t addr, uint32_t control)
 {
        struct arm11_common *arm11 = dpm_to_arm11(dpm);
@@ -1104,15 +1104,15 @@ static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index,
        action[0].value = addr;
        action[1].value = control;
 
-       switch (index) {
+       switch (index_t) {
        case 0 ... 15:
-               action[0].address = ARM11_SC7_BVR0 + index;
-               action[1].address = ARM11_SC7_BCR0 + index;
+               action[0].address = ARM11_SC7_BVR0 + index_t;
+               action[1].address = ARM11_SC7_BCR0 + index_t;
                break;
        case 16 ... 32:
-               index -= 16;
-               action[0].address = ARM11_SC7_WVR0 + index;
-               action[1].address = ARM11_SC7_WCR0 + index;
+               index_t -= 16;
+               action[0].address = ARM11_SC7_WVR0 + index_t;
+               action[1].address = ARM11_SC7_WCR0 + index_t;
                break;
        default:
                return ERROR_FAIL;
@@ -1123,7 +1123,7 @@ static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index,
        return ERROR_OK;
 }
 
-static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned index)
+static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned index_t)
 {
        struct arm11_common *arm11 = dpm_to_arm11(dpm);
        struct arm11_sc7_action *action;
@@ -1133,13 +1133,13 @@ static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned index)
        action[0].write = true;
        action[0].value = 0;
 
-       switch (index) {
+       switch (index_t) {
        case 0 ... 15:
-               action[0].address = ARM11_SC7_BCR0 + index;
+               action[0].address = ARM11_SC7_BCR0 + index_t;
                break;
        case 16 ... 32:
-               index -= 16;
-               action[0].address = ARM11_SC7_WCR0 + index;
+               index_t -= 16;
+               action[0].address = ARM11_SC7_WCR0 + index_t;
                break;
        default:
                return ERROR_FAIL;