ARM ADIv5: rename more JTAG-specific routines

[openocd] / src / target / arm720t.c

diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index 48f035868e723b0e65f2fb7194dcc5a8ab307c2b..2275935d1964738b64b92088d7f943932c59df61 100644 (file)
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -235,14 +235,8 @@ static int arm720t_arch_state(struct target *target)
 
        armv4_5 = &arm720t->arm7_9_common.armv4_5_common;
 
-       LOG_USER("target halted in %s state due to %s, current mode: %s\n"
-                       "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
-                       "MMU: %s, Cache: %s",
-                        arm_state_strings[armv4_5->core_state],
-                        Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name ,
-                        arm_mode_name(armv4_5->core_mode),
-                        buf_get_u32(armv4_5->cpsr->value, 0, 32),
-                        buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
+       arm_arch_state(target);
+       LOG_USER("MMU: %s, Cache: %s",
                         state[arm720t->armv4_5_mmu.mmu_enabled],
                         state[arm720t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled]);
 
@@ -261,11 +255,21 @@ static int arm720_mmu(struct target *target, int *enabled)
 }
 
 static int arm720_virt2phys(struct target *target,
-               uint32_t virt, uint32_t *phys)
+               uint32_t virtual, uint32_t *physical)
 {
-       /** @todo Implement this!  */
-       LOG_ERROR("%s: not implemented", __func__);
-       return ERROR_FAIL;
+       int type;
+       uint32_t cb;
+       int domain;
+       uint32_t ap;
+       struct arm720t_common *arm720t = target_to_arm720(target);
+
+       uint32_t ret = armv4_5_mmu_translate_va(target, &arm720t->armv4_5_mmu, virtual, &type, &cb, &domain, &ap);
+       if (type == -1)
+       {
+               return ret;
+       }
+       *physical = ret;
+       return ERROR_OK;
 }
 
 static int arm720t_read_memory(struct target *target,
@@ -357,9 +361,9 @@ static int arm720t_soft_reset_halt(struct target *target)
        armv4_5->cpsr->dirty = 1;
 
        /* start fetching from 0x0 */
-       buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, 0x0);
-       armv4_5->core_cache->reg_list[15].dirty = 1;
-       armv4_5->core_cache->reg_list[15].valid = 1;
+       buf_set_u32(armv4_5->pc->value, 0, 32, 0x0);
+       armv4_5->pc->dirty = 1;
+       armv4_5->pc->valid = 1;
 
        arm720t_disable_mmu_caches(target, 1, 1, 1);
        arm720t->armv4_5_mmu.mmu_enabled = 0;
@@ -522,8 +526,10 @@ static const struct command_registration arm720t_exec_command_handlers[] = {
                .name = "cp15",
                .handler = arm720t_handle_cp15_command,
                .mode = COMMAND_EXEC,
-               .usage = "<opcode> [value]",
-               .help = "display/modify cp15 register",
+               /* prefer using less error-prone "arm mcr" or "arm mrc" */
+               .help = "display/modify cp15 register using ARM opcode"
+                       " (DEPRECATED)",
+               .usage = "instruction [value]",
        },
        COMMAND_REGISTRATION_DONE
 };
@@ -582,4 +588,5 @@ struct target_type arm720t_target =
        .target_create = arm720t_target_create,
        .init_target = arm720t_init_target,
        .examine = arm7_9_examine,
+       .check_reset = arm7_9_check_reset,
 };