Change tap_state naming to be consistent with SVF documentation.

[openocd] / src / target / arm7_9_common.c

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 9161aa677026c93a0363ad3fd261c43a0c0c66f2..357daa39feb1dbf1bede26747ff04d818f2da56b 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -231,7 +231,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                                return retval;
                        }
 
-                       if ((retval = target->type->read_memory(target, breakpoint->address, 4, 1, (u8 *)&verify)) != ERROR_OK)
+                       if ((retval = target_read_u32(target, breakpoint->address, &verify)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -255,7 +255,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                                return retval;
                        }
 
-                       if ((retval = target->type->read_memory(target, breakpoint->address, 2, 1, (u8 *)&verify)) != ERROR_OK)
+                       if ((retval = target_read_u16(target, breakpoint->address, &verify)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -584,7 +584,7 @@ int arm7_9_execute_sys_speed(struct target_s *target)
        reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 
        /* set RESTART instruction */
-       jtag_add_end_state(TAP_RTI);
+       jtag_add_end_state(TAP_IDLE);
        if (arm7_9->need_bypass_before_restart) {
                arm7_9->need_bypass_before_restart = 0;
                arm_jtag_set_instr(jtag_info, 0xf, NULL);
@@ -630,7 +630,7 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target)
        reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 
        /* set RESTART instruction */
-       jtag_add_end_state(TAP_RTI);
+       jtag_add_end_state(TAP_IDLE);
        if (arm7_9->need_bypass_before_restart) {
                arm7_9->need_bypass_before_restart = 0;
                arm_jtag_set_instr(jtag_info, 0xf, NULL);
@@ -1492,14 +1492,14 @@ int arm7_9_restart_core(struct target_s *target)
        arm_jtag_t *jtag_info = &arm7_9->jtag_info;
 
        /* set RESTART instruction */
-       jtag_add_end_state(TAP_RTI);
+       jtag_add_end_state(TAP_IDLE);
        if (arm7_9->need_bypass_before_restart) {
                arm7_9->need_bypass_before_restart = 0;
                arm_jtag_set_instr(jtag_info, 0xf, NULL);
        }
        arm_jtag_set_instr(jtag_info, 0x4, NULL);
 
-       jtag_add_runtest(1, TAP_RTI);
+       jtag_add_runtest(1, TAP_IDLE);
        return jtag_execute_queue();
 }
 
@@ -1553,6 +1553,9 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
        if (!current)
                buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
 
+       u32 current_pc;
+       current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
+
        /* the front-end may request us not to handle breakpoints */
        if (handle_breakpoints)
        {
@@ -1564,8 +1567,18 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
                                return retval;
                        }
 
+                       /* calculate PC of next instruction */
+                       u32 next_pc;
+                       if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
+                       {
+                               u32 current_opcode;
+                               target_read_u32(target, current_pc, &current_opcode);
+                               LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
+                               return retval;
+                       }
+
                        LOG_DEBUG("enable single-step");
-                       arm7_9->enable_single_step(target);
+                       arm7_9->enable_single_step(target, next_pc);
 
                        target->debug_reason = DBG_REASON_SINGLESTEP;
 
@@ -1675,23 +1688,13 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
        return ERROR_OK;
 }
 
-void arm7_9_enable_eice_step(target_t *target)
+void arm7_9_enable_eice_step(target_t *target, u32 next_pc)
 {
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
-       int retval;
 
        u32 current_pc;
        current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
-       
-       u32 next_pc;
-       if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
-       {
-               u32 current_opcode;
-               target_read_u32(target, current_pc, &current_opcode);
-               LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
-               return;
-       }
 
        if(next_pc != current_pc)
        {
@@ -1756,6 +1759,9 @@ int arm7_9_step(struct target_s *target, int current, u32 address, int handle_br
        if (!current)
                buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
 
+       u32 current_pc;
+       current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
+
        /* the front-end may request us not to handle breakpoints */
        if (handle_breakpoints)
                if ((breakpoint = breakpoint_find(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32))))
@@ -1766,12 +1772,22 @@ int arm7_9_step(struct target_s *target, int current, u32 address, int handle_br
 
        target->debug_reason = DBG_REASON_SINGLESTEP;
 
+       /* calculate PC of next instruction */
+       u32 next_pc;
+       if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
+       {
+               u32 current_opcode;
+               target_read_u32(target, current_pc, &current_opcode);
+               LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
+               return retval;
+       }
+
        if ((retval = arm7_9_restore_context(target)) != ERROR_OK)
        {
                return retval;
        }
 
-       arm7_9->enable_single_step(target);
+       arm7_9->enable_single_step(target, next_pc);
 
        if (armv4_5->core_state == ARMV4_5_STATE_ARM)
        {
@@ -2000,9 +2016,11 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
                                 * from a sufficiently high clock (32 kHz is usually too slow)
                                 */
                                if (arm7_9->fast_memory_access)
-                                       arm7_9_execute_fast_sys_speed(target);
+                                       retval = arm7_9_execute_fast_sys_speed(target);
                                else
-                                       arm7_9_execute_sys_speed(target);
+                                       retval = arm7_9_execute_sys_speed(target);
+                               if (retval != ERROR_OK)
+                                       return retval;
 
                                arm7_9->read_core_regs_target_buffer(target, reg_list, buffer, 4);
 
@@ -2331,9 +2349,10 @@ static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int ti
 
                embeddedice_reg_t *ice_reg = arm7_9->eice_cache->reg_list[EICE_COMMS_DATA].arch_info;
                u8 reg_addr = ice_reg->addr & 0x1f;
-               int chain_pos = ice_reg->jtag_info->chain_pos;
+               jtag_tap_t *tap;
+               tap = ice_reg->jtag_info->tap;
 
-               embeddedice_write_dcc(chain_pos, reg_addr, buffer, little, count-2);
+               embeddedice_write_dcc(tap, reg_addr, buffer, little, count-2);
                buffer += (count-2)*4;
 
                embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little));
@@ -2592,8 +2611,6 @@ int arm7_9_register_commands(struct command_context_s *cmd_ctx)
 
        register_command(cmd_ctx, arm7_9_cmd, "dbgrq", handle_arm7_9_dbgrq_command,
                COMMAND_ANY, "use EmbeddedICE dbgrq instead of breakpoint for target halt requests <enable|disable>");
-       register_command(cmd_ctx, arm7_9_cmd, "fast_writes", handle_arm7_9_fast_memory_access_command,
-                COMMAND_ANY, "(deprecated, see: arm7_9 fast_memory_access)");
        register_command(cmd_ctx, arm7_9_cmd, "fast_memory_access", handle_arm7_9_fast_memory_access_command,
                 COMMAND_ANY, "use fast memory accesses instead of slower but potentially unsafe slow accesses <enable|disable>");
        register_command(cmd_ctx, arm7_9_cmd, "dcc_downloads", handle_arm7_9_dcc_downloads_command,