struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
/* set RESTART instruction */
- jtag_set_end_state(TAP_IDLE);
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
- arm_jtag_set_instr(jtag_info, 0xf, NULL);
+ arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
}
- arm_jtag_set_instr(jtag_info, 0x4, NULL);
+ arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
long long then = timeval_ms();
int timeout;
struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
/* set RESTART instruction */
- jtag_set_end_state(TAP_IDLE);
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
- arm_jtag_set_instr(jtag_info, 0xf, NULL);
+ arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
}
- arm_jtag_set_instr(jtag_info, 0x4, NULL);
+ arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
if (!set)
{
* certain ARM9 cores (maybe more) - AT91SAM9260
* and STR9
*/
- jtag_add_runtest(1, jtag_get_end_state());
+ jtag_add_runtest(1, TAP_IDLE);
}
else
{
arm7_9->write_pc(target, buf_get_u32(armv4_5->pc->value, 0, 32));
armv4_5->pc->dirty = 0;
- if (arm7_9->post_restore_context)
- arm7_9->post_restore_context(target);
-
return ERROR_OK;
}
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
/* set RESTART instruction */
- jtag_set_end_state(TAP_IDLE);
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
- arm_jtag_set_instr(jtag_info, 0xf, NULL);
+ arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
}
- arm_jtag_set_instr(jtag_info, 0x4, NULL);
+ arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
- jtag_add_runtest(1, jtag_set_end_state(TAP_IDLE));
+ jtag_add_runtest(1, TAP_IDLE);
return jtag_execute_queue();
}