]> git.sur5r.net Git - openocd/blobdiff - src/target/arm7_9_common.c
ARM ADI-V5: cleanup CID/PID addressing
[openocd] / src / target / arm7_9_common.c
index 85c68163affe3998c9f4e29aeac18573db3f4ef2..abe0c2f13790b2bf4cd51867641c509e8c8ab541 100644 (file)
@@ -184,7 +184,7 @@ static int arm7_9_set_software_breakpoints(struct arm7_9_common *arm7_9)
  * @param target Pointer to an ARM7/9 target to setup
  * @return Result of clearing the watchpoints on the target
  */
-int arm7_9_setup(struct target *target)
+static int arm7_9_setup(struct target *target)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
@@ -202,7 +202,7 @@ int arm7_9_setup(struct target *target)
  *         queue.  For software breakpoints, this will be the status of the
  *         required memory reads and writes
  */
-int arm7_9_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
+static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
        int retval = ERROR_OK;
@@ -331,7 +331,7 @@ int arm7_9_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
  *         queue.  For software breakpoints, this will be the status of the
  *         required memory reads and writes
  */
-int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *breakpoint)
+static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
        int retval = ERROR_OK;
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -377,6 +377,7 @@ int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *breakpoint
                        {
                                return retval;
                        }
+                        current_instr = target_buffer_get_u32(target, (uint8_t *)&current_instr);
                        if (current_instr == arm7_9->arm_bkpt)
                                if ((retval = target_write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
                                {
@@ -506,7 +507,7 @@ int arm7_9_remove_breakpoint(struct target *target, struct breakpoint *breakpoin
  * @return Error status if watchpoint set fails or the result of executing the
  *         JTAG queue
  */
-int arm7_9_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
+static int arm7_9_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
        int retval = ERROR_OK;
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -577,7 +578,7 @@ int arm7_9_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
  * @return Error status while trying to unset the watchpoint or the result of
  *         executing the JTAG queue
  */
-int arm7_9_unset_watchpoint(struct target *target, struct watchpoint *watchpoint)
+static int arm7_9_unset_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
        int retval = ERROR_OK;
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -687,7 +688,6 @@ int arm7_9_execute_sys_speed(struct target *target)
        struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 
        /* set RESTART instruction */
-       jtag_set_end_state(TAP_IDLE);
        if (arm7_9->need_bypass_before_restart) {
                arm7_9->need_bypass_before_restart = 0;
                arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
@@ -730,7 +730,7 @@ int arm7_9_execute_sys_speed(struct target *target)
  * @param target Pointer to the target to issue commands to
  * @return Always ERROR_OK
  */
-int arm7_9_execute_fast_sys_speed(struct target *target)
+static int arm7_9_execute_fast_sys_speed(struct target *target)
 {
        static int set = 0;
        static uint8_t check_value[4], check_mask[4];
@@ -740,7 +740,6 @@ int arm7_9_execute_fast_sys_speed(struct target *target)
        struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 
        /* set RESTART instruction */
-       jtag_set_end_state(TAP_IDLE);
        if (arm7_9->need_bypass_before_restart) {
                arm7_9->need_bypass_before_restart = 0;
                arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
@@ -806,7 +805,7 @@ int arm7_9_target_request_data(struct target *target, uint32_t size, uint8_t *bu
  * @return ERROR_OK unless there are issues with the JTAG queue or when reading
  *                  from the Embedded ICE unit
  */
-int arm7_9_handle_target_request(void *priv)
+static int arm7_9_handle_target_request(void *priv)
 {
        int retval = ERROR_OK;
        struct target *target = priv;
@@ -995,7 +994,7 @@ int arm7_9_assert_reset(struct target *target)
                         * certain ARM9 cores (maybe more) - AT91SAM9260
                         * and STR9
                         */
-                       jtag_add_runtest(1, jtag_get_end_state());
+                       jtag_add_runtest(1, TAP_IDLE);
                }
                else
                {
@@ -1097,7 +1096,7 @@ int arm7_9_deassert_reset(struct target *target)
  * @param target Pointer to the ARM7/9 target to have halt cleared
  * @return Always ERROR_OK
  */
-int arm7_9_clear_halt(struct target *target)
+static int arm7_9_clear_halt(struct target *target)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
        struct reg *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
@@ -1485,7 +1484,7 @@ static int arm7_9_debug_entry(struct target *target)
  * @return Error if the target is not halted, has an invalid core mode, or if
  *         the JTAG queue fails to execute
  */
-int arm7_9_full_context(struct target *target)
+static int arm7_9_full_context(struct target *target)
 {
        int i;
        int retval;
@@ -1581,7 +1580,7 @@ int arm7_9_full_context(struct target *target)
  * @return Error status if the target is not halted or the core mode in the
  *         armv4_5 struct is invalid.
  */
-int arm7_9_restore_context(struct target *target)
+static int arm7_9_restore_context(struct target *target)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
        struct arm *armv4_5 = &arm7_9->armv4_5_common;
@@ -1737,13 +1736,12 @@ int arm7_9_restore_context(struct target *target)
  * @param target Pointer to the ARM7/9 target to be restarted
  * @return Result of executing the JTAG queue
  */
-int arm7_9_restart_core(struct target *target)
+static int arm7_9_restart_core(struct target *target)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
        struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* set RESTART instruction */
-       jtag_set_end_state(TAP_IDLE);
        if (arm7_9->need_bypass_before_restart) {
                arm7_9->need_bypass_before_restart = 0;
                arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
@@ -1760,7 +1758,7 @@ int arm7_9_restart_core(struct target *target)
  *
  * @param target Pointer to the ARM7/9 target to enable watchpoints on
  */
-void arm7_9_enable_watchpoints(struct target *target)
+static void arm7_9_enable_watchpoints(struct target *target)
 {
        struct watchpoint *watchpoint = target->watchpoints;
 
@@ -1778,7 +1776,7 @@ void arm7_9_enable_watchpoints(struct target *target)
  *
  * @param target Pointer to the ARM7/9 target to enable breakpoints on
  */
-void arm7_9_enable_breakpoints(struct target *target)
+static void arm7_9_enable_breakpoints(struct target *target)
 {
        struct breakpoint *breakpoint = target->breakpoints;
 
@@ -2465,7 +2463,20 @@ int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size,
                                if (arm7_9->fast_memory_access)
                                        retval = arm7_9_execute_fast_sys_speed(target);
                                else
+                               {
                                        retval = arm7_9_execute_sys_speed(target);
+
+                                       /*
+                                        * if memory writes are made when the clock is running slow
+                                        * (i.e. 32 kHz) which is necessary in some scripts to reconfigure
+                                        * processor operations after a "reset halt" or "reset init",
+                                        * need to immediately stroke the keep alive or will end up with
+                                        * gdb "keep alive not sent error message" problem.
+                                        */
+
+                                       keep_alive();
+                               }
+
                                if (retval != ERROR_OK)
                                {
                                        return retval;
@@ -2501,7 +2512,20 @@ int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size,
                                        if (arm7_9->fast_memory_access)
                                                retval = arm7_9_execute_fast_sys_speed(target);
                                        else
+                                       {
                                                retval = arm7_9_execute_sys_speed(target);
+
+                                               /*
+                                                * if memory writes are made when the clock is running slow
+                                                * (i.e. 32 kHz) which is necessary in some scripts to reconfigure
+                                                * processor operations after a "reset halt" or "reset init",
+                                                * need to immediately stroke the keep alive or will end up with
+                                                * gdb "keep alive not sent error message" problem.
+                                                */     
+
+                                               keep_alive();
+                                       }
+
                                        if (retval != ERROR_OK)
                                        {
                                                return retval;
@@ -2536,7 +2560,20 @@ int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size,
                                        if (arm7_9->fast_memory_access)
                                                retval = arm7_9_execute_fast_sys_speed(target);
                                        else
-                                               retval = arm7_9_execute_sys_speed(target);
+                                        {
+                                                retval = arm7_9_execute_sys_speed(target);
+
+                                                /*
+                                                 * if memory writes are made when the clock is running slow
+                                                 * (i.e. 32 kHz) which is necessary in some scripts to reconfigure
+                                                 * processor operations after a "reset halt" or "reset init",
+                                                 * need to immediately stroke the keep alive or will end up with
+                                                 * gdb "keep alive not sent error message" problem.
+                                                 */
+
+                                                keep_alive();
+                                        }
+
                                        if (retval != ERROR_OK)
                                        {
                                                return retval;
@@ -2831,7 +2868,7 @@ COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
        return ERROR_OK;
 }
 
-int arm7_9_setup_semihosting(struct target *target, int enable)
+static int arm7_9_setup_semihosting(struct target *target, int enable)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);