]> git.sur5r.net Git - openocd/blobdiff - src/target/arm7_9_common.c
target: groundwork for "reset-assert" event
[openocd] / src / target / arm7_9_common.c
index 1601ee17d3f6075d667b1e7ed2c182ad02b9ef5a..f7b86693d2a5bc888f09cea0c28bf64ee821fc3e 100644 (file)
@@ -2659,7 +2659,13 @@ static const uint32_t dcc_code[] =
        0xeafffff9      /*    b   w                   */
 };
 
-int armv4_5_run_algorithm_inner(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target *target, uint32_t exit_point, int timeout_ms, void *arch_info));
+extern int armv4_5_run_algorithm_inner(struct target *target,
+       int num_mem_params, struct mem_param *mem_params,
+       int num_reg_params, struct reg_param *reg_params,
+       uint32_t entry_point, uint32_t exit_point,
+       int timeout_ms, void *arch_info,
+       int (*run_it)(struct target *target, uint32_t exit_point,
+                       int timeout_ms, void *arch_info));
 
 int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
 {
@@ -2709,7 +2715,9 @@ int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t c
        dcc_count = count;
        dcc_buffer = buffer;
        retval = armv4_5_run_algorithm_inner(target, 0, NULL, 1, reg_params,
-                       arm7_9->dcc_working_area->address, arm7_9->dcc_working_area->address + 6*4, 20*1000, &armv4_5_info, arm7_9_dcc_completion);
+                       arm7_9->dcc_working_area->address,
+                               arm7_9->dcc_working_area->address + 6*4,
+                       20*1000, &armv4_5_info, arm7_9_dcc_completion);
 
        if (retval == ERROR_OK)
        {
@@ -2847,28 +2855,44 @@ int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9)
                        1, 1, target);
 }
 
-int arm7_9_register_commands(struct command_context *cmd_ctx)
-{
-       struct command *arm7_9_cmd;
-
-       arm7_9_cmd = COMMAND_REGISTER(cmd_ctx, NULL, "arm7_9",
-                       NULL, COMMAND_ANY, "arm7/9 specific commands");
-
-       COMMAND_REGISTER(cmd_ctx, arm7_9_cmd, "dbgrq",
-                       handle_arm7_9_dbgrq_command, COMMAND_ANY,
-                       "use EmbeddedICE dbgrq instead of breakpoint "
-                       "for target halt requests <enable | disable>");
-       COMMAND_REGISTER(cmd_ctx, arm7_9_cmd, "fast_memory_access",
-                       handle_arm7_9_fast_memory_access_command, COMMAND_ANY,
-                       "use fast memory accesses instead of slower "
-                       "but potentially safer accesses <enable | disable>");
-       COMMAND_REGISTER(cmd_ctx, arm7_9_cmd, "dcc_downloads",
-                       handle_arm7_9_dcc_downloads_command, COMMAND_ANY,
-                       "use DCC downloads for larger memory writes <enable | disable>");
-
-       armv4_5_register_commands(cmd_ctx);
-
-       etm_register_commands(cmd_ctx);
-
-       return ERROR_OK;
-}
+static const struct command_registration arm7_9_any_command_handlers[] = {
+       {
+               "dbgrq",
+               .handler = &handle_arm7_9_dbgrq_command,
+               .mode = COMMAND_ANY,
+               .usage = "<enable|disable>",
+               .help = "use EmbeddedICE dbgrq instead of breakpoint "
+                       "for target halt requests",
+       },
+       {
+               "fast_memory_access",
+               .handler = &handle_arm7_9_fast_memory_access_command,
+               .mode = COMMAND_ANY,
+               .usage = "<enable|disable>",
+               .help = "use fast memory accesses instead of slower "
+                       "but potentially safer accesses",
+       },
+       {
+               "dcc_downloads",
+               .handler = &handle_arm7_9_dcc_downloads_command,
+               .mode = COMMAND_ANY,
+               .usage = "<enable | disable>",
+               .help = "use DCC downloads for larger memory writes",
+       },
+       COMMAND_REGISTRATION_DONE
+};
+const struct command_registration arm7_9_command_handlers[] = {
+       {
+               .chain = arm_command_handlers,
+       },
+       {
+               .chain = etm_command_handlers,
+       },
+       {
+               .name = "arm7_9",
+               .mode = COMMAND_ANY,
+               .help = "arm7/9 specific commands",
+               .chain = arm7_9_any_command_handlers,
+       },
+       COMMAND_REGISTRATION_DONE
+};