#define ARM7_9_COMMON_H
#include "breakpoints.h"
-#include "etm.h"
+#include "armv4_5.h"
#define ARM7_9_COMMON_MAGIC 0x0a790a79 /**< */
/**
* Structure for items that are common between both ARM7 and ARM9 targets.
*/
-typedef struct arm7_9_common_s
+struct arm7_9_common
{
+ struct arm armv4_5_common;
uint32_t common_magic;
- arm_jtag_t jtag_info; /**< JTAG information for target */
+ struct arm_jtag jtag_info; /**< JTAG information for target */
reg_cache_t *eice_cache; /**< Embedded ICE register cache */
uint32_t arm_bkpt; /**< ARM breakpoint instruction */
uint16_t thumb_bkpt; /**< Thumb breakpoint instruction */
- bool force_hw_bkpts;
int sw_breakpoints_added; /**< Specifies which watchpoint software breakpoints are setup on */
int sw_breakpoint_count; /**< keep track of number of software breakpoints we have set */
bool fast_memory_access;
bool dcc_downloads;
- etm_context_t *etm_ctx;
-
struct working_area_s *dcc_working_area;
int (*examine_debug_reason)(target_t *target); /**< Function for determining why debug state was entered */
void (*pre_restore_context)(target_t *target); /**< Callback function called before restoring the processor context */
void (*post_restore_context)(target_t *target); /**< Callback function called after restoring the processor context */
- armv4_5_common_t armv4_5_common;
- void *arch_info;
-} arm7_9_common_t;
+};
+
+static inline struct arm7_9_common *
+target_to_arm7_9(struct target_s *target)
+{
+ return container_of(target->arch_info, struct arm7_9_common,
+ armv4_5_common);
+}
int arm7_9_register_commands(struct command_context_s *cmd_ctx);
int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum);
int arm7_9_blank_check_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank);
-int arm7_9_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_prams, reg_param_t *reg_param, uint32_t entry_point, void *arch_info);
+int arm7_9_run_algorithm(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_prams, struct reg_param *reg_param, uint32_t entry_point, void *arch_info);
int arm7_9_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
-int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
-int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
+int arm7_9_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint);
+int arm7_9_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint);
void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc);
void arm7_9_disable_eice_step(target_t *target);
int arm7_9_execute_sys_speed(struct target_s *target);
-int arm7_9_init_arch_info(target_t *target, arm7_9_common_t *arm7_9);
-int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p);
+int arm7_9_init_arch_info(target_t *target, struct arm7_9_common *arm7_9);
+int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, struct arm7_9_common **arm7_9_p);
#endif /* ARM7_9_COMMON_H */