]> git.sur5r.net Git - openocd/blobdiff - src/target/arm7tdmi.c
MIPS: make fixed code arrays static const
[openocd] / src / target / arm7tdmi.c
index d576d073bb0ebcf50ecaba25704cef78a2a4d47a..bd29caf9b22641756ebc492c94d22ec8097d16f4 100644 (file)
@@ -58,12 +58,10 @@ static int arm7tdmi_examine_debug_reason(struct target *target)
 
                jtag_set_end_state(TAP_DRPAUSE);
 
-               fields[0].tap = arm7_9->jtag_info.tap;
                fields[0].num_bits = 1;
                fields[0].out_value = NULL;
                fields[0].in_value = &breakpoint;
 
-               fields[1].tap = arm7_9->jtag_info.tap;
                fields[1].num_bits = 32;
                fields[1].out_value = NULL;
                fields[1].in_value = databus;
@@ -74,7 +72,7 @@ static int arm7tdmi_examine_debug_reason(struct target *target)
                }
                arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
 
-               jtag_add_dr_scan(2, fields, jtag_set_end_state(TAP_DRPAUSE));
+               jtag_add_dr_scan(arm7_9->jtag_info.tap, 2, fields, jtag_set_end_state(TAP_DRPAUSE));
                if ((retval = jtag_execute_queue()) != ERROR_OK)
                {
                        return retval;
@@ -85,7 +83,7 @@ static int arm7tdmi_examine_debug_reason(struct target *target)
                fields[1].in_value = NULL;
                fields[1].out_value = databus;
 
-               jtag_add_dr_scan(2, fields, jtag_set_end_state(TAP_DRPAUSE));
+               jtag_add_dr_scan(arm7_9->jtag_info.tap, 2, fields, jtag_set_end_state(TAP_DRPAUSE));
 
                if (breakpoint & 1)
                        target->debug_reason = DBG_REASON_WATCHPOINT;
@@ -141,17 +139,15 @@ static int arm7tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in)
        }
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
-       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 1;
        fields[0].out_value = NULL;
        fields[0].in_value = NULL;
 
-       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 32;
        fields[1].out_value = NULL;
        fields[1].in_value = (uint8_t *)in;
 
-       jtag_add_dr_scan(2, fields, jtag_get_end_state());
+       jtag_add_dr_scan(jtag_info->tap, 2, fields, jtag_get_end_state());
 
        jtag_add_callback(arm7flip32, (jtag_callback_data_t)in);
 
@@ -228,17 +224,15 @@ static int arm7tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
        }
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
-       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 1;
        fields[0].out_value = NULL;
        fields[0].in_value = NULL;
 
-       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 32;
        fields[1].out_value = NULL;
        jtag_alloc_in_value32(&fields[1]);
 
-       jtag_add_dr_scan(2, fields, jtag_get_end_state());
+       jtag_add_dr_scan(jtag_info->tap, 2, fields, jtag_get_end_state());
 
        jtag_add_callback4(arm7endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[1].in_value);
 
@@ -598,7 +592,8 @@ static void arm7tdmi_branch_resume_thumb(struct target *target)
        /* fetch NOP, LDM in EXECUTE stage (1st cycle) */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
        /* nothing fetched, LDM in EXECUTE stage (2nd cycle) */
-       arm7tdmi_clock_out(jtag_info, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) | 1, NULL, 0);
+       arm7tdmi_clock_out(jtag_info,
+                       buf_get_u32(armv4_5->pc->value, 0, 32) | 1, NULL, 0);
        /* nothing fetched, LDM in EXECUTE stage (3rd cycle) */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
 
@@ -752,4 +747,5 @@ struct target_type arm7tdmi_target =
        .target_create  = arm7tdmi_target_create,
        .init_target = arm7tdmi_init_target,
        .examine = arm7_9_examine,
+       .check_reset = arm7_9_check_reset,
 };