for (i = 0; i <= 15; i++)
{
if (mask & (1 << i))
- /* nothing fetched, STM still in EXECUTE (1+i cycle) */
+ /* nothing fetched, STM still in EXECUTE (1 + i cycle) */
arm7tdmi_clock_data_in(jtag_info, core_regs[i]);
}
}
for (i = 0; i <= 15; i++)
{
- /* nothing fetched, STM still in EXECUTE (1+i cycle), read databus */
+ /* nothing fetched, STM still in EXECUTE (1 + i cycle), read databus */
if (mask & (1 << i))
{
switch (size)
for (i = 0; i <= 15; i++)
{
if (mask & (1 << i))
- /* nothing fetched, LDM still in EXECUTE (1+i cycle) */
+ /* nothing fetched, LDM still in EXECUTE (1 + i cycle) */
arm7tdmi_clock_out_inner(jtag_info, core_regs[i], 0);
}
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
return ERROR_OK;
}
-int arm7tdmi_target_create( struct target_s *target, Jim_Interp *interp )
+int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp)
{
arm7tdmi_common_t *arm7tdmi;