]> git.sur5r.net Git - openocd/blobdiff - src/target/arm920t.c
ZY1000 help/usage fixups
[openocd] / src / target / arm920t.c
index 6a005d6d8ca76d5b7b497be13598f3c6ffec2f0d..29eb62d330ebe8f4baa872fc77f9e7bcbb97569f 100644 (file)
@@ -25,6 +25,7 @@
 #include <helper/time_support.h>
 #include "target_type.h"
 #include "register.h"
+#include "arm_opcodes.h"
 
 
 /*
@@ -448,14 +449,8 @@ int arm920t_arch_state(struct target *target)
 
        armv4_5 = &arm920t->arm7_9_common.armv4_5_common;
 
-       LOG_USER("target halted in %s state due to %s, current mode: %s\n"
-                       "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
-                       "MMU: %s, D-Cache: %s, I-Cache: %s",
-                        arm_state_strings[armv4_5->core_state],
-                        Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name,
-                        arm_mode_name(armv4_5->core_mode),
-                        buf_get_u32(armv4_5->cpsr->value, 0, 32),
-                        buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
+       arm_arch_state(target);
+       LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
                         state[arm920t->armv4_5_mmu.mmu_enabled],
                         state[arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
                         state[arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
@@ -1389,35 +1384,39 @@ static int arm920t_mcr(struct target *target, int cpnum,
 static const struct command_registration arm920t_exec_command_handlers[] = {
        {
                .name = "cp15",
-               .handler = &arm920t_handle_cp15_command,
+               .handler = arm920t_handle_cp15_command,
                .mode = COMMAND_EXEC,
                .help = "display/modify cp15 register",
-               .usage = "<num> [value]",
+               .usage = "regnum [value]",
        },
        {
                .name = "cp15i",
-               .handler = &arm920t_handle_cp15i_command,
+               .handler = arm920t_handle_cp15i_command,
                .mode = COMMAND_EXEC,
-               .help = "display/modify cp15 (interpreted access)",
-               .usage = "<opcode> [value] [address]",
+               /* prefer using less error-prone "arm mcr" or "arm mrc" */
+               .help = "display/modify cp15 register using ARM opcode"
+                       " (DEPRECATED)",
+               .usage = "instruction [value [address]]",
        },
        {
                .name = "cache_info",
-               .handler = &arm920t_handle_cache_info_command,
+               .handler = arm920t_handle_cache_info_command,
                .mode = COMMAND_EXEC,
                .help = "display information about target caches",
        },
        {
                .name = "read_cache",
-               .handler = &arm920t_handle_read_cache_command,
+               .handler = arm920t_handle_read_cache_command,
                .mode = COMMAND_EXEC,
-               .help = "display I/D cache content",
+               .help = "dump I/D cache content to file",
+               .usage = "filename",
        },
        {
                .name = "read_mmu",
-               .handler = &arm920t_handle_read_mmu_command,
+               .handler = arm920t_handle_read_mmu_command,
                .mode = COMMAND_EXEC,
-               .help = "display I/D mmu content",
+               .help = "dump I/D mmu content to file",
+               .usage = "filename",
        },
        COMMAND_REGISTRATION_DONE
 };
@@ -1452,7 +1451,7 @@ struct target_type arm920t_target =
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm920t_soft_reset_halt,
 
-       .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+       .get_gdb_reg_list = arm_get_gdb_reg_list,
 
        .read_memory = arm920t_read_memory,
        .write_memory = arm920t_write_memory,