MIPS: make fixed code arrays static const

[openocd] / src / target / arm920t.c

diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 3e6154510685d167b703aaafbf7b41cc0eec3b08..a7816fd8c6a61ac817a12d678d2580b6037054ec 100644 (file)
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -95,31 +95,27 @@ static int arm920t_read_cp15_physical(struct target *target,
        arm_jtag_scann(jtag_info, 0xf);
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
-       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 1;
        fields[0].out_value = &access_type_buf;
        fields[0].in_value = NULL;
 
-       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 32;
        fields[1].out_value = NULL;
        fields[1].in_value = NULL;
 
-       fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 6;
        fields[2].out_value = &reg_addr_buf;
        fields[2].in_value = NULL;
 
-       fields[3].tap = jtag_info->tap;
        fields[3].num_bits = 1;
        fields[3].out_value = &nr_w_buf;
        fields[3].in_value = NULL;
 
-       jtag_add_dr_scan(4, fields, jtag_get_end_state());
+       jtag_add_dr_scan(jtag_info->tap, 4, fields, jtag_get_end_state());
 
        fields[1].in_value = (uint8_t *)value;
 
-       jtag_add_dr_scan(4, fields, jtag_get_end_state());
+       jtag_add_dr_scan(jtag_info->tap, 4, fields, jtag_get_end_state());
 
        jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
 
@@ -150,27 +146,23 @@ static int arm920t_write_cp15_physical(struct target *target,
        arm_jtag_scann(jtag_info, 0xf);
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
-       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 1;
        fields[0].out_value = &access_type_buf;
        fields[0].in_value = NULL;
 
-       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 32;
        fields[1].out_value = value_buf;
        fields[1].in_value = NULL;
 
-       fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 6;
        fields[2].out_value = &reg_addr_buf;
        fields[2].in_value = NULL;
 
-       fields[3].tap = jtag_info->tap;
        fields[3].num_bits = 1;
        fields[3].out_value = &nr_w_buf;
        fields[3].in_value = NULL;
 
-       jtag_add_dr_scan(4, fields, jtag_get_end_state());
+       jtag_add_dr_scan(jtag_info->tap, 4, fields, jtag_get_end_state());
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
@@ -206,27 +198,23 @@ static int arm920t_execute_cp15(struct target *target, uint32_t cp15_opcode,
 
        buf_set_u32(cp15_opcode_buf, 0, 32, cp15_opcode);
 
-       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 1;
        fields[0].out_value = &access_type_buf;
        fields[0].in_value = NULL;
 
-       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 32;
        fields[1].out_value = cp15_opcode_buf;
        fields[1].in_value = NULL;
 
-       fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 6;
        fields[2].out_value = &reg_addr_buf;
        fields[2].in_value = NULL;
 
-       fields[3].tap = jtag_info->tap;
        fields[3].num_bits = 1;
        fields[3].out_value = &nr_w_buf;
        fields[3].in_value = NULL;
 
-       jtag_add_dr_scan(4, fields, jtag_get_end_state());
+       jtag_add_dr_scan(jtag_info->tap, 4, fields, jtag_get_end_state());
 
        arm9tdmi_clock_out(jtag_info, arm_opcode, 0, NULL, 0);
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
@@ -777,9 +765,9 @@ int arm920t_soft_reset_halt(struct target *target)
        armv4_5->cpsr->dirty = 1;
 
        /* start fetching from 0x0 */
-       buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, 0x0);
-       armv4_5->core_cache->reg_list[15].dirty = 1;
-       armv4_5->core_cache->reg_list[15].valid = 1;
+       buf_set_u32(armv4_5->pc->value, 0, 32, 0x0);
+       armv4_5->pc->dirty = 1;
+       armv4_5->pc->valid = 1;
 
        arm920t_disable_mmu_caches(target, 1, 1, 1);
        arm920t->armv4_5_mmu.mmu_enabled = 0;