]> git.sur5r.net Git - openocd/blobdiff - src/target/arm926ejs.c
arm920t line length cleanup
[openocd] / src / target / arm926ejs.c
index 329aa12a43c26eece14ebdad7c0d5989d513f6d6..32ecf72d9626f76aa4518fec163c9cf86f2bb18d 100644 (file)
 #endif
 
 #include "arm926ejs.h"
-#include "time_support.h"
+#include <helper/time_support.h>
 #include "target_type.h"
 #include "register.h"
+#include "arm_opcodes.h"
 
 
 /*
@@ -504,14 +505,8 @@ int arm926ejs_arch_state(struct target *target)
 
        armv4_5 = &arm926ejs->arm7_9_common.armv4_5_common;
 
-       LOG_USER("target halted in %s state due to %s, current mode: %s\n"
-                       "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
-                       "MMU: %s, D-Cache: %s, I-Cache: %s",
-                        armv4_5_state_strings[armv4_5->core_state],
-                        Jim_Nvp_value2name_simple(nvp_target_debug_reason,target->debug_reason)->name,
-                        arm_mode_name(armv4_5->core_mode),
-                        buf_get_u32(armv4_5->cpsr->value, 0, 32),
-                        buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
+       arm_arch_state(target);
+       LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
                         state[arm926ejs->armv4_5_mmu.mmu_enabled],
                         state[arm926ejs->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
                         state[arm926ejs->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
@@ -673,6 +668,9 @@ int arm926ejs_init_arch_info(struct target *target, struct arm926ejs_common *arm
 {
        struct arm7_9_common *arm7_9 = &arm926ejs->arm7_9_common;
 
+       arm7_9->armv4_5_common.mrc = arm926ejs_mrc;
+       arm7_9->armv4_5_common.mcr = arm926ejs_mcr;
+
        /* initialize arm7/arm9 specific info (including armv4_5) */
        arm9tdmi_init_arch_info(target, arm7_9, tap);
 
@@ -759,14 +757,17 @@ static int arm926ejs_mmu(struct target *target, int *enabled)
 static const struct command_registration arm926ejs_exec_command_handlers[] = {
        {
                .name = "cache_info",
-               .handler = &arm926ejs_handle_cache_info_command,
+               .handler = arm926ejs_handle_cache_info_command,
                .mode = COMMAND_EXEC,
                .help = "display information about target caches",
 
        },
        COMMAND_REGISTRATION_DONE
 };
-static const struct command_registration arm926ejs_command_handlers[] = {
+const struct command_registration arm926ejs_command_handlers[] = {
+       {
+               .chain = arm9tdmi_command_handlers,
+       },
        {
                .name = "arm926ejs",
                .mode = COMMAND_ANY,
@@ -776,13 +777,6 @@ static const struct command_registration arm926ejs_command_handlers[] = {
        COMMAND_REGISTRATION_DONE
 };
 
-/** Registers commands to access coprocessor, cache, and debug resources.  */
-int arm926ejs_register_commands(struct command_context *cmd_ctx)
-{
-       arm9tdmi_register_commands(cmd_ctx);
-       return register_commands(cmd_ctx, NULL, arm926ejs_command_handlers);
-}
-
 /** Holds methods for ARM926 targets. */
 struct target_type arm926ejs_target =
 {
@@ -801,7 +795,7 @@ struct target_type arm926ejs_target =
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm926ejs_soft_reset_halt,
 
-       .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+       .get_gdb_reg_list = arm_get_gdb_reg_list,
 
        .read_memory = arm7_9_read_memory,
        .write_memory = arm926ejs_write_memory,
@@ -817,15 +811,14 @@ struct target_type arm926ejs_target =
        .add_watchpoint = arm7_9_add_watchpoint,
        .remove_watchpoint = arm7_9_remove_watchpoint,
 
-       .register_commands = arm926ejs_register_commands,
+       .commands = arm926ejs_command_handlers,
        .target_create = arm926ejs_target_create,
        .init_target = arm9tdmi_init_target,
        .examine = arm7_9_examine,
+       .check_reset = arm7_9_check_reset,
        .virt2phys = arm926ejs_virt2phys,
        .mmu = arm926ejs_mmu,
 
        .read_phys_memory = arm926ejs_read_phys_memory,
        .write_phys_memory = arm926ejs_write_phys_memory,
-       .mrc = arm926ejs_mrc,
-       .mcr = arm926ejs_mcr,
 };