armv4_5 = &arm926ejs->arm7_9_common.armv4_5_common;
- LOG_USER("target halted in %s state due to %s, current mode: %s\n"
- "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
- "MMU: %s, D-Cache: %s, I-Cache: %s",
- arm_state_strings[armv4_5->core_state],
- Jim_Nvp_value2name_simple(nvp_target_debug_reason,target->debug_reason)->name,
- arm_mode_name(armv4_5->core_mode),
- buf_get_u32(armv4_5->cpsr->value, 0, 32),
- buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
+ arm_arch_state(target);
+ LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
state[arm926ejs->armv4_5_mmu.mmu_enabled],
state[arm926ejs->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
state[arm926ejs->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
static const struct command_registration arm926ejs_exec_command_handlers[] = {
{
.name = "cache_info",
- .handler = &arm926ejs_handle_cache_info_command,
+ .handler = arm926ejs_handle_cache_info_command,
.mode = COMMAND_EXEC,
.help = "display information about target caches",
.target_create = arm926ejs_target_create,
.init_target = arm9tdmi_init_target,
.examine = arm7_9_examine,
+ .check_reset = arm7_9_check_reset,
.virt2phys = arm926ejs_virt2phys,
.mmu = arm926ejs_mmu,