more changes to dsp563xx code

[openocd] / src / target / arm_adi_v5.h

diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index 92469eb48926697cedf854cdd9013eb3232a6ad1..f64f7c8404e3248d6d4d57d8c9c64a7cf96cc3c4 100644 (file)
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -59,6 +59,9 @@
 #define DP_SELECT              0x8             /* JTAG: r/w; SWD: write */
 #define DP_RDBUFF              0xC             /* read-only */
 
+#define WCR_TO_TRN(wcr) (1 + (3 & ((wcr)) >> 8))       /* 1..4 clocks */
+#define WCR_TO_PRESCALE(wcr) (7 & ((wcr)))             /* impl defined */
+
 /* Fields of the DP's AP ABORT register */
 #define DAPABORT               (1 << 0)
 #define STKCMPCLR              (1 << 1)        /* SWD-only */
@@ -178,7 +181,6 @@ struct adiv5_dap
        uint32_t        memaccess_tck;
        /* Size of TAR autoincrement block, ARM ADI Specification requires at least 10 bits */
        uint32_t tar_autoincr_block;
-
 };
 
 /**
@@ -380,6 +382,13 @@ int mem_ap_write_buf_u32(struct adiv5_dap *swjdp,
 /* Initialisation of the debug system, power domains and registers */
 int ahbap_debugport_init(struct adiv5_dap *swjdp);
 
+/* Probe the AP for ROM Table location */
+int dap_get_debugbase(struct adiv5_dap *dap, int apsel,
+                       uint32_t *dbgbase, uint32_t *apid);
+
+/* Lookup CoreSight component */
+int dap_lookup_cs_component(struct adiv5_dap *dap, int apsel,
+                       uint32_t dbgbase, uint8_t type, uint32_t *addr);
 
 struct target;