retval = dpm_modeswitch(dpm, ARM_MODE_ANY);
arm->cpsr->dirty = false;
- retval = dpm_write_reg(dpm, &cache->reg_list[15], 15);
- cache->reg_list[15].dirty = false;
+ retval = dpm_write_reg(dpm, arm->pc, 15);
+ arm->pc->dirty = false;
/* flush R0 -- it's *very* dirty by now */
retval = dpm_write_reg(dpm, &cache->reg_list[0], 0);
xp->control = control;
xp->dirty = true;
- LOG_DEBUG("BPWP: addr %8.8x, control %x, number %d",
+ LOG_DEBUG("BPWP: addr %8.8" PRIx32 ", control %" PRIx32 ", number %d",
xp->address, control, xp->number);
/* hardware is updated in write_dirty_registers() */
return retval;
}
-static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned index,
+static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned index_t,
struct watchpoint *wp)
{
int retval;
- struct dpm_wp *dwp = dpm->dwp + index;
+ struct dpm_wp *dwp = dpm->dwp + index_t;
uint32_t control;
/* this hardware doesn't support data value matching or masking */
}
dwp->bpwp.control = control;
- dpm->dwp[index].wp = wp;
+ dpm->dwp[index_t].wp = wp;
return retval;
}