ARM ADIv5: rename more JTAG-specific routines

[openocd] / src / target / arm_semihosting.c

diff --git a/src/target/arm_semihosting.c b/src/target/arm_semihosting.c
index 8db60a582dbc18439f6dd353366b9df3cf65c7dc..24a4de57cea48652638673da452913a05a148b0d 100644 (file)
--- a/src/target/arm_semihosting.c
+++ b/src/target/arm_semihosting.c
@@ -43,6 +43,7 @@
 #include "arm_semihosting.h"
 #include <helper/binarybuffer.h>
 #include <helper/log.h>
+#include <sys/stat.h>
 
 static int open_modeflags[12] = {
        O_RDONLY,
@@ -189,7 +190,7 @@ static int do_semihosting(struct target *target)
                        } else {
                                result = read(fd, buf, l);
                                armv4_5->semihosting_errno = errno;
-                               if (result > 0) {
+                               if (result >= 0) {
                                        retval = target_write_buffer(target, a, result, buf);
                                        if (retval != ERROR_OK) {
                                                free(buf);
@@ -392,8 +393,8 @@ static int do_semihosting(struct target *target)
        armv4_5->core_cache->reg_list[0].dirty = 1;
 
        /* LR --> PC */
-       buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, lr);
-       armv4_5->core_cache->reg_list[15].dirty = 1;
+       buf_set_u32(armv4_5->pc->value, 0, 32, lr);
+       armv4_5->pc->dirty = 1;
 
        /* saved PSR --> current PSR */
        buf_set_u32(armv4_5->cpsr->value, 0, 32, spsr);
@@ -428,7 +429,7 @@ int arm_semihosting(struct target *target, int *retval)
                return 0;
 
        /* Check for PC == 0x00000008 or 0xffff0008: Supervisor Call vector. */
-       r = arm->core_cache->reg_list + 15;
+       r = arm->pc;
        pc = buf_get_u32(r->value, 0, 32);
        if (pc != 0x00000008 && pc != 0xffff0008)
                return 0;