]> git.sur5r.net Git - openocd/blobdiff - src/target/armv4_5.c
Reset wip. Just adding hooks. This is just to reduce the size of the actual change...
[openocd] / src / target / armv4_5.c
index 2528f1072cfc875996b905b4104c745de9772248..07033bfbb8937c2974e46dce0cd61c18d2d8975d 100644 (file)
@@ -183,7 +183,7 @@ int armv4_5_mode_to_number(enum armv4_5_mode mode)
                case ARMV4_5_MODE_SYS: return 6; break;
                case ARMV4_5_MODE_ANY: return 0; break; /* map MODE_ANY to user mode */
                default: 
-                       ERROR("invalid mode value encountered");
+                       LOG_ERROR("invalid mode value encountered");
                        return -1;
        }
 }
@@ -201,7 +201,7 @@ enum armv4_5_mode armv4_5_number_to_mode(int number)
                case 5: return ARMV4_5_MODE_UND; break;
                case 6: return ARMV4_5_MODE_SYS; break;
                default: 
-                       ERROR("mode index out of bounds");
+                       LOG_ERROR("mode index out of bounds");
                        return -1;
        }
 };
@@ -217,7 +217,7 @@ int armv4_5_get_core_reg(reg_t *reg)
                return ERROR_TARGET_NOT_HALTED;
        }
        
-       //retval = armv4_5->armv4_5_common->full_context(target);
+       /* retval = armv4_5->armv4_5_common->full_context(target); */
        retval = armv4_5->armv4_5_common->read_core_reg(target, armv4_5->num, armv4_5->mode);
        
        return retval;
@@ -243,7 +243,7 @@ int armv4_5_set_core_reg(reg_t *reg, u8 *buf)
                        if (armv4_5_target->core_state == ARMV4_5_STATE_ARM)
                        {
                                /* change state to Thumb */
-                               DEBUG("changing to Thumb state");
+                               LOG_DEBUG("changing to Thumb state");
                                armv4_5_target->core_state = ARMV4_5_STATE_THUMB;       
                        }
                }
@@ -253,14 +253,14 @@ int armv4_5_set_core_reg(reg_t *reg, u8 *buf)
                        if (armv4_5_target->core_state == ARMV4_5_STATE_THUMB)
                        {
                                /* change state to ARM */
-                               DEBUG("changing to ARM state");
+                               LOG_DEBUG("changing to ARM state");
                                armv4_5_target->core_state = ARMV4_5_STATE_ARM; 
                        }
                }
                
                if (armv4_5_target->core_mode != (value & 0x1f))
                {
-                       DEBUG("changing ARM core mode to '%s'", armv4_5_mode_strings[armv4_5_mode_to_number(value & 0x1f)]);
+                       LOG_DEBUG("changing ARM core mode to '%s'", armv4_5_mode_strings[armv4_5_mode_to_number(value & 0x1f)]);
                        armv4_5_target->core_mode = value & 0x1f;
                        armv4_5_target->write_core_reg(target, 16, ARMV4_5_MODE_ANY, value);
                }
@@ -328,11 +328,11 @@ int armv4_5_arch_state(struct target_s *target)
        
        if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
        {
-               ERROR("BUG: called for a non-ARMv4/5 target");
+               LOG_ERROR("BUG: called for a non-ARMv4/5 target");
                exit(-1);
        }
        
-       USER("target halted in %s state due to %s, current mode: %s\ncpsr: 0x%8.8x pc: 0x%8.8x",
+       LOG_USER("target halted in %s state due to %s, current mode: %s\ncpsr: 0x%8.8x pc: 0x%8.8x",
                         armv4_5_state_strings[armv4_5->core_state],
                         target_debug_reason_strings[target->debug_reason],
                         armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
@@ -474,11 +474,6 @@ int armv4_5_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list
        armv4_5_common_t *armv4_5 = target->arch_info;
        int i;
        
-       if (target->state != TARGET_HALTED)
-       {
-               return ERROR_TARGET_NOT_HALTED;
-       }
-       
        *reg_list_size = 26;
        *reg_list = malloc(sizeof(reg_t*) * (*reg_list_size));
        
@@ -509,16 +504,17 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
        int exit_breakpoint_size = 0;
        int i;
        int retval = ERROR_OK;
+       LOG_DEBUG("Running algorithm");
        
        if (armv4_5_algorithm_info->common_magic != ARMV4_5_COMMON_MAGIC)
        {
-               ERROR("current target isn't an ARMV4/5 target");
+               LOG_ERROR("current target isn't an ARMV4/5 target");
                return ERROR_TARGET_INVALID;
        }
        
        if (target->state != TARGET_HALTED)
        {
-               WARNING("target not halted");
+               LOG_WARNING("target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
        
@@ -540,13 +536,13 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
                reg_t *reg = register_get_by_name(armv4_5->core_cache, reg_params[i].reg_name, 0);
                if (!reg)
                {
-                       ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
+                       LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
                        exit(-1);
                }
                
                if (reg->size != reg_params[i].size)
                {
-                       ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
+                       LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
                        exit(-1);
                }
                
@@ -560,13 +556,13 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
                exit_breakpoint_size = 2;
        else
        {
-               ERROR("BUG: can't execute algorithms when not in ARM or Thumb state");
+               LOG_ERROR("BUG: can't execute algorithms when not in ARM or Thumb state");
                exit(-1);
        }
        
        if (armv4_5_algorithm_info->core_mode != ARMV4_5_MODE_ANY)
        {
-               DEBUG("setting core_mode: 0x%2.2x", armv4_5_algorithm_info->core_mode);
+               LOG_DEBUG("setting core_mode: 0x%2.2x", armv4_5_algorithm_info->core_mode);
                buf_set_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 5, armv4_5_algorithm_info->core_mode);
                armv4_5->core_cache->reg_list[ARMV4_5_CPSR].dirty = 1;
                armv4_5->core_cache->reg_list[ARMV4_5_CPSR].valid = 1;
@@ -574,29 +570,29 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
 
        if ((retval = breakpoint_add(target, exit_point, exit_breakpoint_size, BKPT_HARD)) != ERROR_OK)
        {
-               ERROR("can't add breakpoint to finish algorithm execution");
+               LOG_ERROR("can't add breakpoint to finish algorithm execution");
                return ERROR_TARGET_FAILURE;
        }
        
-       target->type->resume(target, 0, entry_point, 1, 1);
-       target->type->poll(target);
+       target_resume(target, 0, entry_point, 1, 1);
+       target_poll(target);
        
        while (target->state != TARGET_HALTED)
        {
                usleep(10000);
-               target->type->poll(target);
+               target_poll(target);
                if ((timeout_ms -= 10) <= 0)
                {
-                       ERROR("timeout waiting for algorithm to complete, trying to halt target");
-                       target->type->halt(target);
+                       LOG_ERROR("timeout waiting for algorithm to complete, trying to halt target");
+                       target_halt(target);
                        timeout_ms = 1000;
                        while (target->state != TARGET_HALTED)
                        {
                                usleep(10000);
-                               target->type->poll(target);
+                               target_poll(target);
                                if ((timeout_ms -= 10) <= 0)
                                {
-                                       ERROR("target didn't reenter debug state, exiting");
+                                       LOG_ERROR("target didn't reenter debug state, exiting");
                                        exit(-1);
                                }
                        }
@@ -607,7 +603,7 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
        if ((retval != ERROR_TARGET_TIMEOUT) && 
                (buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) != exit_point))
        {
-               WARNING("target reentered debug state, but not at the desired exit point: 0x%4.4x",
+               LOG_WARNING("target reentered debug state, but not at the desired exit point: 0x%4.4x",
                        buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32)); 
        }
        
@@ -627,13 +623,13 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
                        reg_t *reg = register_get_by_name(armv4_5->core_cache, reg_params[i].reg_name, 0);
                        if (!reg)
                        {
-                               ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
+                               LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
                                exit(-1);
                        }
                        
                        if (reg->size != reg_params[i].size)
                        {
-                               ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
+                               LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
                                exit(-1);
                        }
                        
@@ -643,7 +639,7 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
        
        for (i = 0; i <= 16; i++)
        {
-               DEBUG("restoring register %s with value 0x%8.8x", ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).name, context[i]);
+               LOG_DEBUG("restoring register %s with value 0x%8.8x", ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).name, context[i]);
                buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).value, 0, 32, context[i]);
                ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).valid = 1;
                ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).dirty = 1;