return ERROR_OK;
}
-struct reg_cache* armv4_5_build_reg_cache(target_t *target, armv4_5_common_t *armv4_5_common)
+struct reg_cache* armv4_5_build_reg_cache(target_t *target, struct arm *armv4_5_common)
{
int num_regs = 37;
struct reg_cache *cache = malloc(sizeof(struct reg_cache));
uint32_t address;
int count = 1;
int i;
- arm_instruction_t cur_instruction;
+ struct arm_instruction cur_instruction;
uint32_t opcode;
uint16_t thumb_opcode;
int thumb = 0;
return armv4_5_run_algorithm_inner(target, num_mem_params, mem_params, num_reg_params, reg_params, entry_point, exit_point, timeout_ms, arch_info, armv4_5_run_algorithm_completion);
}
-int armv4_5_init_arch_info(target_t *target, armv4_5_common_t *armv4_5)
+int armv4_5_init_arch_info(target_t *target, struct arm *armv4_5)
{
target->arch_info = armv4_5;