/* ARMV7M is always in thumb mode, try to make GDB understand this
* if it does not support this arch */
- *((char*)armv7m->core_cache->reg_list[15].value) |= 1;
+ *((char*)armv7m->arm.pc->value) |= 1;
#else
(*reg_list)[25] = &armv7m->core_cache->reg_list[ARMV7M_xPSR];
#endif
int armv7m_arch_state(struct target *target)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
+ struct arm *arm = &armv7m->arm;
uint32_t ctrl, sp;
ctrl = buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_CONTROL].value, 0, 32);
debug_reason_name(target),
armv7m_mode_strings[armv7m->core_mode],
armv7m_exception_string(armv7m->exception_number),
- buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32),
- buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_PC].value, 0, 32),
+ buf_get_u32(arm->cpsr->value, 0, 32),
+ buf_get_u32(arm->pc->value, 0, 32),
(ctrl & 0x02) ? 'p' : 'm',
sp);
struct reg_cache *armv7m_build_reg_cache(struct target *target)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
+ struct arm *arm = &armv7m->arm;
int num_regs = ARMV7M_NUM_REGS;
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
struct reg_cache *cache = malloc(sizeof(struct reg_cache));
reg_list[i].arch_info = &arch_info[i];
}
+ arm->cpsr = reg_list + ARMV7M_xPSR;
+ arm->pc = reg_list + ARMV7M_PC;
+ arm->core_cache = cache;
return cache;
}
/** Sets up target as a generic ARMv7-M core */
int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m)
{
- /* register arch-specific functions */
+ struct arm *arm = &armv7m->arm;
- target->arch_info = armv7m;
+ armv7m->common_magic = ARMV7M_COMMON_MAGIC;
+
+ arm->core_type = ARM_MODE_THREAD;
+ arm->arch_info = armv7m;
+
+ /* FIXME remove v7m-specific r/w core_reg functions;
+ * use the generic ARM core support..
+ */
armv7m->read_core_reg = armv7m_read_core_reg;
armv7m->write_core_reg = armv7m_write_core_reg;
- return ERROR_OK;
+ return arm_init_arch_info(target, arm);
}
/** Generates a CRC32 checksum of a memory region. */
int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
- struct reg *r = armv7m->core_cache->reg_list + 15;
+ struct reg *r = armv7m->arm.pc;
bool result = false;
/*
* Only stuff below this line should need to verify that its target
* is an ARMv7-M node.
- *
- * FIXME yet none of it _does_ verify target types yet!
*/
struct armv7m_common *armv7m = target_to_armv7m(target);
struct swjdp_common *swjdp = &armv7m->swjdp_info;
+ if (!is_armv7m(armv7m)) {
+ command_print(CMD_CTX, "current target isn't an ARM7-M");
+ return ERROR_TARGET_INVALID;
+ }
+
return CALL_COMMAND_HANDLER(dap_baseaddr_command, swjdp);
}
struct armv7m_common *armv7m = target_to_armv7m(target);
struct swjdp_common *swjdp = &armv7m->swjdp_info;
+ if (!is_armv7m(armv7m)) {
+ command_print(CMD_CTX, "current target isn't an ARM7-M");
+ return ERROR_TARGET_INVALID;
+ }
+
return CALL_COMMAND_HANDLER(dap_apid_command, swjdp);
}
struct armv7m_common *armv7m = target_to_armv7m(target);
struct swjdp_common *swjdp = &armv7m->swjdp_info;
+ if (!is_armv7m(armv7m)) {
+ command_print(CMD_CTX, "current target isn't an ARM7-M");
+ return ERROR_TARGET_INVALID;
+ }
+
return CALL_COMMAND_HANDLER(dap_apsel_command, swjdp);
}
struct armv7m_common *armv7m = target_to_armv7m(target);
struct swjdp_common *swjdp = &armv7m->swjdp_info;
+ if (!is_armv7m(armv7m)) {
+ command_print(CMD_CTX, "current target isn't an ARM7-M");
+ return ERROR_TARGET_INVALID;
+ }
+
return CALL_COMMAND_HANDLER(dap_memaccess_command, swjdp);
}
struct swjdp_common *swjdp = &armv7m->swjdp_info;
uint32_t apsel;
+ if (!is_armv7m(armv7m)) {
+ command_print(CMD_CTX, "current target isn't an ARM7-M");
+ return ERROR_TARGET_INVALID;
+ }
+
switch (CMD_ARGC) {
case 0:
apsel = swjdp->apsel;