arm920t line length cleanup

[openocd] / src / target / armv7m.h

diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 07090b411bb556b95f77abb8d3a591ea882e1a87..b6be1d22497e340ed542463a0df4e0b9efca4708 100644 (file)
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -26,8 +26,8 @@
 #ifndef ARMV7M_COMMON_H
 #define ARMV7M_COMMON_H
 
-#include <target/arm_adi_v5.h>
-#include <target/arm.h>
+#include "arm_adi_v5.h"
+#include "arm.h"
 
 /* define for enabling armv7 gdb workarounds */
 #if 1
@@ -106,9 +106,14 @@ struct armv7m_common
        int exception_number;
        struct swjdp_common swjdp_info;
 
+       uint32_t demcr;
+
        /* Direct processor core register read and writes */
-       int (*load_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t *value);
-       int (*store_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t value);
+       int (*load_core_reg_u32)(struct target *target,
+               enum armv7m_regtype type, uint32_t num, uint32_t *value);
+       int (*store_core_reg_u32)(struct target *target,
+               enum armv7m_regtype type, uint32_t num, uint32_t value);
+
        /* register cache to processor synchronization */
        int (*read_core_reg)(struct target *target, unsigned num);
        int (*write_core_reg)(struct target *target, unsigned num);
@@ -126,6 +131,11 @@ target_to_armv7m(struct target *target)
        return target->arch_info;
 }
 
+static inline bool is_armv7m(struct armv7m_common *armv7m)
+{
+       return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
+}
+
 struct armv7m_algorithm
 {
        int common_magic;
@@ -166,6 +176,8 @@ int armv7m_checksum_memory(struct target *target,
 int armv7m_blank_check_memory(struct target *target,
                uint32_t address, uint32_t count, uint32_t* blank);
 
+int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
+
 extern const struct command_registration armv7m_command_handlers[];
 
 #endif /* ARMV7M_H */