int exception_number;
struct swjdp_common swjdp_info;
+ uint32_t demcr;
+
/* Direct processor core register read and writes */
- int (*load_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t *value);
- int (*store_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t value);
+ int (*load_core_reg_u32)(struct target *target,
+ enum armv7m_regtype type, uint32_t num, uint32_t *value);
+ int (*store_core_reg_u32)(struct target *target,
+ enum armv7m_regtype type, uint32_t num, uint32_t value);
+
/* register cache to processor synchronization */
int (*read_core_reg)(struct target *target, unsigned num);
int (*write_core_reg)(struct target *target, unsigned num);
return target->arch_info;
}
+static inline bool is_armv7m(struct armv7m_common *armv7m)
+{
+ return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
+}
+
struct armv7m_algorithm
{
int common_magic;
int armv7m_blank_check_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t* blank);
+int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
+
extern const struct command_registration armv7m_command_handlers[];
#endif /* ARMV7M_H */