cortex a8: add missing error handling from cortex_a8_exec_opcode()

[openocd] / src / target / cortex_a8.h

diff --git a/src/target/cortex_a8.h b/src/target/cortex_a8.h
index 3b2c8b16d567007dc6e8a06971d8050d9a7ee4d1..7e116e49a441a167839ad169010790e01d6eeae1 100644 (file)
--- a/src/target/cortex_a8.h
+++ b/src/target/cortex_a8.h
@@ -31,8 +31,6 @@
 
 #include "armv7a.h"
 
-extern char* cortex_a8_state_strings[];
-
 #define CORTEX_A8_COMMON_MAGIC 0x411fc082
 
 /* See Cortex-A8 TRM section 12.5 */
@@ -54,15 +52,6 @@ struct cortex_a8_brp
        uint8_t BRPn;
 };
 
-struct cortex_a8_wrp
-{
-       int used;
-       int type;
-       uint32_t value;
-       uint32_t control;
-       uint8_t WRPn;
-};
-
 struct cortex_a8_common
 {
        int common_magic;
@@ -70,32 +59,22 @@ struct cortex_a8_common
 
        /* Context information */
        uint32_t cpudbg_dscr;
-       uint32_t nvic_dfsr;  /* Debug Fault Status Register - shows reason for debug halt */
-       uint32_t nvic_icsr;  /* Interrupt Control State Register - shows active and pending IRQ */
 
        /* Saved cp15 registers */
        uint32_t cp15_control_reg;
-       uint32_t cp15_aux_control_reg;
 
        /* Breakpoint register pairs */
        int brp_num_context;
        int brp_num;
        int brp_num_available;
-//     int brp_enabled;
        struct cortex_a8_brp *brp_list;
 
-       /* Watchpoint register pairs */
-       int wrp_num;
-       int wrp_num_available;
-       struct cortex_a8_wrp *wrp_list;
-
-       /* Interrupts */
-       int intlinesnum;
-       uint32_t *intsetenable;
-
        /* Use cortex_a8_read_regs_through_mem for fast register reads */
        int fast_reg_read;
 
+       /* Flag that helps to resolve what ttb to use: user or kernel */
+       int current_address_mode;
+
        struct armv7a_common armv7a_common;
 };