]> git.sur5r.net Git - openocd/blobdiff - src/target/cortex_a9.c
arm_adi_v5: add wrapping transfer functions with selection of ap
[openocd] / src / target / cortex_a9.c
index c13d41c81dfb38e48bbdcad92af7d079bccf8745..422da3f7da0687b1810369adcb01853c2a7d9b71 100644 (file)
@@ -1521,6 +1521,23 @@ static int cortex_a9_read_phys_memory(struct target *target,
                        uint32_t saved_r0, saved_r1;
                        int nbytes = count * size;
                        uint32_t data;
+                       int enabled = 0;
+
+                       if (target->state != TARGET_HALTED)
+                       {
+                               LOG_WARNING("target not halted");
+                               return ERROR_TARGET_NOT_HALTED;
+                       }
+
+                       retval = cortex_a9_mmu(target, &enabled);
+                       if (retval != ERROR_OK)
+                               return retval;
+
+                       if (enabled)
+                       {
+                               LOG_WARNING("Reading physical memory through APB with MMU enabled is not yet implemented");
+                               return ERROR_TARGET_FAILURE;
+                       }
 
                        /* save registers r0 and r1, we are going to corrupt them  */
                        retval = cortex_a9_dap_read_coreregister_u32(target, &saved_r0, 0);
@@ -1629,6 +1646,23 @@ static int cortex_a9_write_phys_memory(struct target *target,
                        uint32_t saved_r0, saved_r1;
                        int nbytes = count * size;
                        uint32_t data;
+                       int enabled = 0;
+
+                       if (target->state != TARGET_HALTED)
+                       {
+                               LOG_WARNING("target not halted");
+                               return ERROR_TARGET_NOT_HALTED;
+                       }
+
+                       retval = cortex_a9_mmu(target, &enabled);
+                       if (retval != ERROR_OK)
+                               return retval;
+
+                       if (enabled)
+                       {
+                               LOG_WARNING("Writing physical memory through APB with MMU enabled is not yet implemented");
+                               return ERROR_TARGET_FAILURE;
+                       }
 
                        /* save registers r0 and r1, we are going to corrupt them  */
                        retval = cortex_a9_dap_read_coreregister_u32(target, &saved_r0, 0);