]> git.sur5r.net Git - openocd/blobdiff - src/target/cortex_m.c
armv7m: use consistent arm.cpsr member
[openocd] / src / target / cortex_m.c
index 26e556948c0bdd95b05776a649b5feffcd00094e..fbe635bdd8bc695bfe90b49f5e27cd4389179c49 100644 (file)
@@ -430,7 +430,7 @@ static int cortex_m3_debug_entry(struct target *target)
                        arm->read_core_reg(target, r, i, ARM_MODE_ANY);
        }
 
-       r = arm->core_cache->reg_list + ARMV7M_xPSR;
+       r = arm->cpsr;
        xPSR = buf_get_u32(r->value, 0, 32);
 
 #ifdef ARMV7_GDB_HACKS
@@ -632,6 +632,12 @@ static int cortex_m3_soft_reset_halt(struct target *target)
        uint32_t dcb_dhcsr = 0;
        int retval, timeout = 0;
 
+       /* soft_reset_halt is deprecated on cortex_m as the same functionality
+        * can be obtained by using 'reset halt' and 'cortex_m reset_config vectreset'
+        * As this reset only used VC_CORERESET it would only ever reset the cortex_m
+        * core, not the peripherals */
+       LOG_WARNING("soft_reset_halt is deprecated, please use 'reset halt' instead.");
+
        /* Enter debug state on reset; restore DEMCR in endreset_event() */
        retval = mem_ap_write_u32(swjdp, DCB_DEMCR,
                        TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
@@ -726,7 +732,7 @@ static int cortex_m3_resume(struct target *target, int current,
                r->valid = true;
 
                /* Make sure we are in Thumb mode */
-               r = armv7m->arm.core_cache->reg_list + ARMV7M_xPSR;
+               r = armv7m->arm.cpsr;
                buf_set_u32(r->value, 24, 1, 1);
                r->dirty = true;
                r->valid = true;
@@ -2186,7 +2192,7 @@ COMMAND_HANDLER(handle_cortex_m3_mask_interrupts_command)
        }
 
        n = Jim_Nvp_value2name_simple(nvp_maskisr_modes, cortex_m3->isrmasking_mode);
-       command_print(CMD_CTX, "cortex_m3 interrupt mask %s", n->name);
+       command_print(CMD_CTX, "cortex_m interrupt mask %s", n->name);
 
        return ERROR_OK;
 }
@@ -2223,7 +2229,7 @@ COMMAND_HANDLER(handle_cortex_m3_reset_config_command)
                        break;
        }
 
-       command_print(CMD_CTX, "cortex_m3 reset_config %s", reset_config);
+       command_print(CMD_CTX, "cortex_m reset_config %s", reset_config);
 
        return ERROR_OK;
 }
@@ -2233,7 +2239,7 @@ static const struct command_registration cortex_m3_exec_command_handlers[] = {
                .name = "maskisr",
                .handler = handle_cortex_m3_mask_interrupts_command,
                .mode = COMMAND_EXEC,
-               .help = "mask cortex_m3 interrupts",
+               .help = "mask cortex_m interrupts",
                .usage = "['auto'|'on'|'off']",
        },
        {