]> git.sur5r.net Git - openocd/blobdiff - src/target/cortex_m3.c
retire daemon_startup
[openocd] / src / target / cortex_m3.c
index fb3b36b46a55be674f520f4571d8ab6369b0a5c6..e3ed4cfbb81dcbaf0875246844241b99b6364b41 100644 (file)
@@ -81,6 +81,7 @@ target_type_t cortexm3_target =
        .write_memory = cortex_m3_write_memory,
        .bulk_write_memory = cortex_m3_bulk_write_memory,
        .checksum_memory = armv7m_checksum_memory,
+       .blank_check_memory = armv7m_blank_check_memory,
        
        .run_algorithm = armv7m_run_algorithm,
        
@@ -673,7 +674,7 @@ int cortex_m3_assert_reset(target_t *target)
        armv7m_common_t *armv7m = target->arch_info;
        cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
        swjdp_common_t *swjdp = &cortex_m3->swjdp_info;
-       int assert_srst = TRUE;
+       int assert_srst = 1;
        
        LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
        
@@ -690,7 +691,7 @@ int cortex_m3_assert_reset(target_t *target)
                
        ahbap_write_system_u32(swjdp, DCB_DCRDR, 0 );
        
-       if (target->reset_mode == RESET_RUN)
+       if (!target->reset_halt)
        {
                /* Set/Clear C_MASKINTS in a separate operation */
                if (cortex_m3->dcb_dhcsr & C_MASKINTS)
@@ -724,20 +725,20 @@ int cortex_m3_assert_reset(target_t *target)
                        {
                                case 0:
                                        /* all Sandstorm suffer issue */
-                                       assert_srst = FALSE;
+                                       assert_srst = 0;
                                        break;
                                
                                case 1:
                                case 3:
                                        /* only Fury/DustDevil rev A suffer reset problems */
                                        if (((did0 >> 8) & 0xff) == 0)
-                                               assert_srst = FALSE;
+                                               assert_srst = 0;
                                        break;
                        }
                }
        }
        
-       if (assert_srst == TRUE)
+       if (assert_srst)
        {
                /* default to asserting srst */
                if (jtag_reset_config & RESET_SRST_PULLS_TRST)
@@ -1366,7 +1367,6 @@ int cortex_m3_examine(struct command_context_s *cmd_ctx, struct target_s *target
        return ERROR_OK;
 }
 
-
 int cortex_m3_quit()
 {
        
@@ -1518,7 +1518,6 @@ int cortex_m3_target_command(struct command_context_s *cmd_ctx, char *cmd, char
                variant = args[4];
        
        cortex_m3_init_arch_info(target, cortex_m3, chain_pos, variant);
-       cortex_m3_register_commands(cmd_ctx);
        
        return ERROR_OK;
 }
@@ -1531,4 +1530,3 @@ int cortex_m3_register_commands(struct command_context_s *cmd_ctx)
        
        return retval;
 }
-