Change tap_state naming to be consistent with SVF documentation.

[openocd] / src / target / embeddedice.c

diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index 7da32fa80710c51e7219a22dd4ee6f230b532117..05c80f8b3f1e845bd332e2fc7fd0c81b8b93cdf8 100644 (file)
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -222,15 +222,17 @@ int embeddedice_setup(target_t *target)
 
 int embeddedice_get_reg(reg_t *reg)
 {
-       if (embeddedice_read_reg(reg) != ERROR_OK)
+       int retval;
+       if ((retval = embeddedice_read_reg(reg)) != ERROR_OK)
        {
                LOG_ERROR("BUG: error scheduling EmbeddedICE register read");
-               exit(-1);
+               return retval;
        }
 
-       if (jtag_execute_queue() != ERROR_OK)
+       if ((retval = jtag_execute_queue()) != ERROR_OK)
        {
                LOG_ERROR("register read failed");
+               return retval;
        }
 
        return ERROR_OK;
@@ -244,12 +246,12 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        u8 field1_out[1];
        u8 field2_out[1];
 
-       jtag_add_end_state(TAP_RTI);
+       jtag_add_end_state(TAP_IDLE);
        arm_jtag_scann(ice_reg->jtag_info, 0x2);
 
        arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL);
 
-       fields[0].device = ice_reg->jtag_info->chain_pos;
+       fields[0].tap = ice_reg->jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = reg->value;
        fields[0].out_mask = NULL;
@@ -259,7 +261,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        fields[0].in_handler = NULL;
        fields[0].in_handler_priv = NULL;
 
-       fields[1].device = ice_reg->jtag_info->chain_pos;
+       fields[1].tap = ice_reg->jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
        buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
@@ -270,7 +272,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        fields[1].in_handler = NULL;
        fields[1].in_handler_priv = NULL;
 
-       fields[2].device = ice_reg->jtag_info->chain_pos;
+       fields[2].tap = ice_reg->jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
        buf_set_u32(fields[2].out_value, 0, 1, 0);
@@ -307,11 +309,11 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
        u8 field1_out[1];
        u8 field2_out[1];
 
-       jtag_add_end_state(TAP_RTI);
+       jtag_add_end_state(TAP_IDLE);
        arm_jtag_scann(jtag_info, 0x2);
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
-       fields[0].device = jtag_info->chain_pos;
+       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
        fields[0].out_mask = NULL;
@@ -321,7 +323,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
        fields[0].in_handler = NULL;
        fields[0].in_handler_priv = NULL;
 
-       fields[1].device = jtag_info->chain_pos;
+       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_DATA]);
@@ -332,7 +334,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
        fields[1].in_handler = NULL;
        fields[1].in_handler_priv = NULL;
 
-       fields[2].device = jtag_info->chain_pos;
+       fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
        buf_set_u32(fields[2].out_value, 0, 1, 0);
@@ -381,12 +383,13 @@ void embeddedice_set_reg(reg_t *reg, u32 value)
 
 int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf)
 {
+       int retval;
        embeddedice_set_reg(reg, buf_get_u32(buf, 0, reg->size));
 
-       if (jtag_execute_queue() != ERROR_OK)
+       if ((retval = jtag_execute_queue()) != ERROR_OK)
        {
                LOG_ERROR("register write failed");
-               exit(-1);
+               return retval;
        }
        return ERROR_OK;
 }
@@ -397,13 +400,13 @@ void embeddedice_write_reg(reg_t *reg, u32 value)
 
        LOG_DEBUG("%i: 0x%8.8x", ice_reg->addr, value);
 
-       jtag_add_end_state(TAP_RTI);
+       jtag_add_end_state(TAP_IDLE);
        arm_jtag_scann(ice_reg->jtag_info, 0x2);
 
        arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL);
 
        u8 reg_addr = ice_reg->addr & 0x1f;
-       embeddedice_write_reg_inner(ice_reg->jtag_info->chain_pos, reg_addr, value);
+       embeddedice_write_reg_inner(ice_reg->jtag_info->tap, reg_addr, value);
 
 }
 
@@ -423,11 +426,11 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
        u8 field1_out[1];
        u8 field2_out[1];
 
-       jtag_add_end_state(TAP_RTI);
+       jtag_add_end_state(TAP_IDLE);
        arm_jtag_scann(jtag_info, 0x2);
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
-       fields[0].device = jtag_info->chain_pos;
+       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = field0_out;
        fields[0].out_mask = NULL;
@@ -437,7 +440,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
        fields[0].in_handler = NULL;
        fields[0].in_handler_priv = NULL;
 
-       fields[1].device = jtag_info->chain_pos;
+       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_DATA]);
@@ -448,7 +451,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
        fields[1].in_handler = NULL;
        fields[1].in_handler_priv = NULL;
 
-       fields[2].device = jtag_info->chain_pos;
+       fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
        buf_set_u32(fields[2].out_value, 0, 1, 1);
@@ -492,11 +495,11 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
        else
                return ERROR_INVALID_ARGUMENTS;
 
-       jtag_add_end_state(TAP_RTI);
+       jtag_add_end_state(TAP_IDLE);
        arm_jtag_scann(jtag_info, 0x2);
        arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
-       fields[0].device = jtag_info->chain_pos;
+       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
        fields[0].out_mask = NULL;
@@ -506,7 +509,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
        fields[0].in_handler = NULL;
        fields[0].in_handler_priv = NULL;
 
-       fields[1].device = jtag_info->chain_pos;
+       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
@@ -517,7 +520,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
        fields[1].in_handler = NULL;
        fields[1].in_handler_priv = NULL;
 
-       fields[2].device = jtag_info->chain_pos;
+       fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
        buf_set_u32(fields[2].out_value, 0, 1, 0);
@@ -547,12 +550,12 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
 }
 
 /* this is the inner loop of the open loop DCC write of data to target */
-void MINIDRIVER(embeddedice_write_dcc)(int chain_pos, int reg_addr, u8 *buffer, int little, int count)
+void MINIDRIVER(embeddedice_write_dcc)(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count)
 {
        int i;
        for (i = 0; i < count; i++)
        {
-               embeddedice_write_reg_inner(chain_pos, reg_addr, fast_target_buffer_get_u32(buffer, little));
+               embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
                buffer += 4;
        }
 }