]> git.sur5r.net Git - openocd/blobdiff - src/target/embeddedice.c
retire unused code.
[openocd] / src / target / embeddedice.c
index 4d76bcaf1f7760e75b87605e8f3ba6adf183250b..270e52bfde5ae21f5ee3f3dd3e040bb1808fb140 100644 (file)
@@ -217,8 +217,6 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        u8 field1_out[1];
        u8 field2_out[1];
 
-       DEBUG("%i", ice_reg->addr);
-
        jtag_add_end_state(TAP_RTI);
        arm_jtag_scann(ice_reg->jtag_info, 0x2);
        
@@ -256,11 +254,10 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        fields[2].in_handler = NULL;
        fields[2].in_handler_priv = NULL;
        
-       jtag_add_dr_scan(3, fields, -1, NULL);
+       jtag_add_dr_scan(3, fields, -1);
        
        fields[0].in_value = reg->value;
-       fields[0].in_check_value = check_value;
-       fields[0].in_check_mask = check_mask;
+       jtag_set_check_value(fields+0, check_value, check_mask, NULL);
        
        /* when reading the DCC data register, leaving the address field set to
         * EICE_COMMS_DATA would read the register twice
@@ -268,7 +265,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
         */
        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
        
-       jtag_add_dr_scan(3, fields, -1, NULL);
+       jtag_add_dr_scan(3, fields, -1);
 
        return ERROR_OK;
 }
@@ -319,7 +316,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
        fields[2].in_handler = NULL;
        fields[2].in_handler_priv = NULL;
        
-       jtag_add_dr_scan(3, fields, -1, NULL);
+       jtag_add_dr_scan(3, fields, -1);
        
        while (size > 0)
        {
@@ -331,7 +328,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
                
                fields[0].in_handler = arm_jtag_buf_to_u32;
                fields[0].in_handler_priv = data;
-               jtag_add_dr_scan(3, fields, -1, NULL);
+               jtag_add_dr_scan(3, fields, -1);
                
                data++;
                size--;
@@ -375,11 +372,6 @@ int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf)
 int embeddedice_write_reg(reg_t *reg, u32 value)
 {
        embeddedice_reg_t *ice_reg = reg->arch_info;
-       u8 reg_addr = ice_reg->addr & 0x1f;
-       scan_field_t fields[3];
-       u8 field0_out[4];
-       u8 field1_out[1];
-       u8 field2_out[1];
 
        DEBUG("%i: 0x%8.8x", ice_reg->addr, value);
        
@@ -387,41 +379,9 @@ int embeddedice_write_reg(reg_t *reg, u32 value)
        arm_jtag_scann(ice_reg->jtag_info, 0x2);
        
        arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL);
-       
-       fields[0].device = ice_reg->jtag_info->chain_pos;
-       fields[0].num_bits = 32;
-       fields[0].out_value = field0_out;
-       buf_set_u32(fields[0].out_value, 0, 32, value);
-       fields[0].out_mask = NULL;
-       fields[0].in_value = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
-       
-       fields[1].device = ice_reg->jtag_info->chain_pos;
-       fields[1].num_bits = 5;
-       fields[1].out_value = field1_out;
-       buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
-       fields[1].out_mask = NULL;
-       fields[1].in_value = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
 
-       fields[2].device = ice_reg->jtag_info->chain_pos;
-       fields[2].num_bits = 1;
-       fields[2].out_value = field2_out;
-       buf_set_u32(fields[2].out_value, 0, 1, 1);
-       fields[2].out_mask = NULL;
-       fields[2].in_value = NULL;
-       fields[2].in_check_value = NULL;
-       fields[2].in_check_mask = NULL;
-       fields[2].in_handler = NULL;
-       fields[2].in_handler_priv = NULL;
-       
-       jtag_add_dr_scan(3, fields, -1, NULL);
+       u8 reg_addr = ice_reg->addr & 0x1f;
+       embeddedice_write_reg_inner(ice_reg->jtag_info->chain_pos, reg_addr, value);
        
        return ERROR_OK;
 }
@@ -481,7 +441,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
        while (size > 0)
        {
                buf_set_u32(fields[0].out_value, 0, 32, *data);
-               jtag_add_dr_scan(3, fields, -1, NULL);
+               jtag_add_dr_scan(3, fields, -1);
 
                data++;
                size--;
@@ -506,7 +466,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
 
        if (hsbit == EICE_COMM_CTRL_WBIT)
                hsact = 1;
-       else if (hsbit != EICE_COMM_CTRL_RBIT)
+       else if (hsbit == EICE_COMM_CTRL_RBIT)
                hsact = 0;
        else
                return ERROR_INVALID_ARGUMENTS;
@@ -547,11 +507,11 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
        fields[2].in_handler = NULL;
        fields[2].in_handler_priv = NULL;
 
-       jtag_add_dr_scan(3, fields, -1, NULL);
+       jtag_add_dr_scan(3, fields, -1);
        gettimeofday(&lap, NULL);
        do
        {
-               jtag_add_dr_scan(3, fields, -1, NULL);
+               jtag_add_dr_scan(3, fields, -1);
                if ((retval = jtag_execute_queue()) != ERROR_OK)
                        return retval;