]> git.sur5r.net Git - openocd/blobdiff - src/target/embeddedice.c
Finish portability support for AC_HEADER_STDBOOL configure macro.
[openocd] / src / target / embeddedice.c
index aa5aacec4c529aa685b28ca618e73ac19e9452e3..892e82641e93d97b00b77e464e44bd8404da8672 100644 (file)
@@ -251,39 +251,26 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        fields[0].tap = ice_reg->jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = reg->value;
-
        fields[0].in_value = NULL;
-
-
-       fields[0].in_handler = NULL;
-
+       
 
        fields[1].tap = ice_reg->jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
        buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
-
        fields[1].in_value = NULL;
-
-
-       fields[1].in_handler = NULL;
-
+       
 
        fields[2].tap = ice_reg->jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
        buf_set_u32(fields[2].out_value, 0, 1, 0);
-
        fields[2].in_value = NULL;
-
-
-       fields[2].in_handler = NULL;
-
+       
 
        jtag_add_dr_scan(3, fields, TAP_INVALID);
 
        fields[0].in_value = reg->value;
-       jtag_set_check_value(fields+0, check_value, check_mask, NULL);
 
        /* when reading the DCC data register, leaving the address field set to
         * EICE_COMMS_DATA would read the register twice
@@ -293,6 +280,8 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 
        jtag_add_dr_scan(3, fields, TAP_INVALID);
 
+       jtag_check_value_mask(fields+0, check_value, check_mask);
+
        return ERROR_OK;
 }
 
@@ -315,21 +304,21 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
        fields[0].out_value = NULL;
        u8 tmp[4];
        fields[0].in_value = tmp;
-       fields[0].in_handler = NULL;
+       
 
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_DATA]);
        fields[1].in_value = NULL;
-       fields[1].in_handler = NULL;
+       
 
        fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
        buf_set_u32(fields[2].out_value, 0, 1, 0);
        fields[2].in_value = NULL;
-       fields[2].in_handler = NULL;
+       
 
        jtag_add_dr_scan(3, fields, TAP_INVALID);
 
@@ -423,7 +412,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
        fields[0].in_value = NULL;
 
 
-       fields[0].in_handler = NULL;
+       
 
 
        fields[1].tap = jtag_info->tap;
@@ -434,7 +423,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
        fields[1].in_value = NULL;
 
 
-       fields[1].in_handler = NULL;
+       
 
 
        fields[2].tap = jtag_info->tap;
@@ -445,7 +434,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
        fields[2].in_value = NULL;
 
 
-       fields[2].in_handler = NULL;
+       
 
 
        while (size > 0)
@@ -492,7 +481,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
        fields[0].in_value = field0_in;
 
 
-       fields[0].in_handler = NULL;
+       
 
 
        fields[1].tap = jtag_info->tap;
@@ -503,7 +492,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
        fields[1].in_value = NULL;
 
 
-       fields[1].in_handler = NULL;
+       
 
 
        fields[2].tap = jtag_info->tap;
@@ -514,7 +503,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
        fields[2].in_value = NULL;
 
 
-       fields[2].in_handler = NULL;
+       
 
 
        jtag_add_dr_scan(3, fields, TAP_INVALID);