arm920t line length cleanup

[openocd] / src / target / embeddedice.c

diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index e375475bbf092a31046d91b061b2aa69e32077c0..bf220364e653a33630a426e243b8faefeb8747f6 100644 (file)
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -35,7 +35,8 @@
  *
  * This provides lowlevel glue to the EmbeddedICE (or EmbeddedICE-RT)
  * module found on scan chain 2 in ARM7, ARM9, and some other families
- * of ARM cores.
+ * of ARM cores.  The module is called "EmbeddedICE-RT" if it has
+ * monitor mode support.
  *
  * EmbeddedICE provides basic watchpoint/breakpoint hardware and a Debug
  * Communications Channel (DCC) used to read or write 32-bit words to
@@ -191,6 +192,11 @@ embeddedice_build_reg_cache(struct target *target, struct arm7_9_common *arm7_9)
        reg_cache->reg_list = reg_list;
        reg_cache->num_regs = num_regs;
 
+       /* FIXME the second watchpoint unit on Feroceon and Dragonite
+        * seems not to work ... we should have a way to not set up
+        * its four registers here!
+        */
+
        /* set up registers */
        for (i = 0; i < num_regs; i++)
        {
@@ -281,14 +287,19 @@ embeddedice_build_reg_cache(struct target *target, struct arm7_9_common *arm7_9)
                         * in some unusual bits.  Let feroceon.c validate it
                         * and do the appropriate setup itself.
                         */
-                       if (strcmp(target_get_name(target), "feroceon") == 0 ||
-                           strcmp(target_get_name(target), "dragonite") == 0)
+                       if (strcmp(target_type_name(target), "feroceon") == 0 ||
+                           strcmp(target_type_name(target), "dragonite") == 0)
                                break;
                        LOG_ERROR("unknown EmbeddedICE version "
                                "(comms ctrl: 0x%8.8" PRIx32 ")",
                                buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
        }
 
+       /* On Feroceon and Dragonite the second unit is seemingly missing. */
+       LOG_INFO("%s: hardware has %d breakpoint/watchpoint unit%s",
+                       target_name(target), arm7_9->wp_available_max,
+                       (arm7_9->wp_available_max != 1) ? "s" : "");
+
        return reg_cache;
 }
 
@@ -349,7 +360,7 @@ int embeddedice_read_reg_w_check(struct reg *reg,
        fields[1].tap = ice_reg->jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
-       buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
+       fields[1].out_value[0] = reg_addr;
        fields[1].in_value = NULL;
        fields[1].check_value = NULL;
        fields[1].check_mask = NULL;
@@ -358,7 +369,7 @@ int embeddedice_read_reg_w_check(struct reg *reg,
        fields[2].tap = ice_reg->jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
-       buf_set_u32(fields[2].out_value, 0, 1, 0);
+       fields[2].out_value[0] = 0;
        fields[2].in_value = NULL;
        fields[2].check_value = NULL;
        fields[2].check_mask = NULL;
@@ -375,7 +386,7 @@ int embeddedice_read_reg_w_check(struct reg *reg,
         * EICE_COMMS_DATA would read the register twice
         * reading the control register is safe
         */
-       buf_set_u32(fields[1].out_value, 0, 5, eice_regs[EICE_COMMS_CTRL].addr);
+       fields[1].out_value[0] = eice_regs[EICE_COMMS_CTRL].addr;
 
        /* traverse Update-DR, reading but with no other side effects */
        jtag_add_dr_scan_check(3, fields, jtag_get_end_state());
@@ -409,13 +420,13 @@ int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t siz
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
-       buf_set_u32(fields[1].out_value, 0, 5, eice_regs[EICE_COMMS_DATA].addr);
+       fields[1].out_value[0] = eice_regs[EICE_COMMS_DATA].addr;
        fields[1].in_value = NULL;
 
        fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
-       buf_set_u32(fields[2].out_value, 0, 1, 0);
+       fields[2].out_value[0] = 0;
        fields[2].in_value = NULL;
 
        jtag_add_dr_scan(3, fields, jtag_get_end_state());
@@ -426,8 +437,7 @@ int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t siz
                 * to avoid reading additional data from the DCC data reg
                 */
                if (size == 1)
-                       buf_set_u32(fields[1].out_value, 0, 5,
-                                       eice_regs[EICE_COMMS_CTRL].addr);
+                       fields[1].out_value[0] = eice_regs[EICE_COMMS_CTRL].addr;
 
                fields[0].in_value = (uint8_t *)data;
                jtag_add_dr_scan(3, fields, jtag_get_end_state());
@@ -531,13 +541,13 @@ int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size)
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
-       buf_set_u32(fields[1].out_value, 0, 5, eice_regs[EICE_COMMS_DATA].addr);
+       fields[1].out_value[0] = eice_regs[EICE_COMMS_DATA].addr;
        fields[1].in_value = NULL;
 
        fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
-       buf_set_u32(fields[2].out_value, 0, 1, 1);
+       fields[2].out_value[0] = 1;
 
        fields[2].in_value = NULL;
 
@@ -587,13 +597,13 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
-       buf_set_u32(fields[1].out_value, 0, 5, eice_regs[EICE_COMMS_DATA].addr);
+       fields[1].out_value[0] = eice_regs[EICE_COMMS_DATA].addr;
        fields[1].in_value = NULL;
 
        fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
-       buf_set_u32(fields[2].out_value, 0, 1, 0);
+       fields[2].out_value[0] = 0;
        fields[2].in_value = NULL;
 
        jtag_add_dr_scan(3, fields, jtag_get_end_state());