- cleaned up cycle counting in ETM analysis

[openocd] / src / target / embeddedice.c

diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index b7e14b615f0f11a1c53859d1de2560dcdfb32053..f601c1ebbbaac89bfd6896e0d4d875cbc75e53f4 100644 (file)
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -178,7 +178,16 @@ reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7
                        arm7_9->has_monitor_mode = 1;
                        break;
                default:
-                       ERROR("unknown EmbeddedICE version (comms ctrl: 0x%4.4x)", buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
+                       ERROR("unknown EmbeddedICE version (comms ctrl: 0x%8.8x)", buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
+       }
+       
+       /* explicitly disable monitor mode */
+       if (arm7_9->has_monitor_mode)
+       {
+               embeddedice_read_reg(&reg_list[EICE_DBG_CTRL]);
+               jtag_execute_queue();
+               buf_set_u32(reg_list[EICE_DBG_CTRL].value, 4, 1, 0);
+               embeddedice_set_reg_w_exec(&reg_list[EICE_DBG_CTRL], reg_list[EICE_DBG_CTRL].value);
        }
        
        return reg_cache;
@@ -210,7 +219,8 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 
        jtag_add_end_state(TAP_RTI);
        arm_jtag_scann(ice_reg->jtag_info, 0x2);
-       arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr);
+       
+       arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL);
        
        fields[0].device = ice_reg->jtag_info->chain_pos;
        fields[0].num_bits = 32;
@@ -244,7 +254,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        fields[2].in_handler = NULL;
        fields[2].in_handler_priv = NULL;
        
-       jtag_add_dr_scan(3, fields, -1);
+       jtag_add_dr_scan(3, fields, -1, NULL);
        
        fields[0].in_value = reg->value;
        fields[0].in_check_value = check_value;
@@ -256,7 +266,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
         */
        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
        
-       jtag_add_dr_scan(3, fields, -1);
+       jtag_add_dr_scan(3, fields, -1, NULL);
 
        free(fields[1].out_value);
        free(fields[2].out_value);
@@ -306,7 +316,8 @@ int embeddedice_write_reg(reg_t *reg, u32 value)
        
        jtag_add_end_state(TAP_RTI);
        arm_jtag_scann(ice_reg->jtag_info, 0x2);
-       arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr);
+       
+       arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL);
        
        fields[0].device = ice_reg->jtag_info->chain_pos;
        fields[0].num_bits = 32;
@@ -341,7 +352,7 @@ int embeddedice_write_reg(reg_t *reg, u32 value)
        fields[2].in_handler = NULL;
        fields[2].in_handler_priv = NULL;
        
-       jtag_add_dr_scan(3, fields, -1);
+       jtag_add_dr_scan(3, fields, -1, NULL);
        
        free(fields[0].out_value);
        free(fields[1].out_value);