target read/write is no longer attempted for target_xxx() functions when the target...

[openocd] / src / target / embeddedice.h

diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index dde37f65f372d2bd1e293516b34e75e5a807bde4..8452fc33767a59c9bb00a4311fcf7a9528ef837d 100644 (file)
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -91,6 +91,7 @@ typedef struct embeddedice_reg_s
 } embeddedice_reg_t;
 
 extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
+extern int embeddedice_setup(target_t *target);
 extern int embeddedice_read_reg(reg_t *reg);
 extern int embeddedice_write_reg(reg_t *reg, u32 value);
 extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
@@ -104,10 +105,8 @@ extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
 /* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of 
  * embeddedice_write_reg
  */
-static __inline__ void embeddedice_write_reg_inner(reg_t *reg, u32 value)
+static __inline__ void embeddedice_write_reg_inner(int chain_pos, int reg_addr, u32 value)
 {
-       embeddedice_reg_t *ice_reg = reg->arch_info;
-       u8 reg_addr = ice_reg->addr & 0x1f;
 #if 1
        u32 values[3];
        int num_bits[3];
@@ -119,7 +118,7 @@ static __inline__ void embeddedice_write_reg_inner(reg_t *reg, u32 value)
        values[2]=1;
        num_bits[2]=1;
        
-       jtag_add_dr_out(ice_reg->jtag_info->chain_pos, 
+       jtag_add_dr_out(chain_pos, 
                        3,
                        num_bits,
                        values,